Patents Assigned to Brillnics Inc.
  • Publication number: 20190166317
    Abstract: One object is to provide a solid-state imaging device that can capture visible light images such as RGB images and infrared images such as NIR images and maintain a high light-receiving sensitivity for infrared light, a method of driving such a solid-state imaging device, and an electronic apparatus. The solid-state imaging device includes: a pixel part having unit pixel groups arranged therein, the unit pixel groups each including a plurality of pixels at least for visible light that perform photoelectric conversion; and a reading part for reading pixel signals from the pixel part, wherein the plurality of pixels for visible light have a light-receiving sensitivity for infrared light, and in an infrared reading mode, the reading part is capable of adding together signals for infrared light read from the plurality of pixels for visible light.
    Type: Application
    Filed: November 28, 2018
    Publication date: May 30, 2019
    Applicant: Brillnics, Inc.
    Inventors: Shunsuke TANAKA, Toshinori OTAKA, Takahiro AKUTSU
  • Publication number: 20190149754
    Abstract: A reading part, in a first reset period PR1, holds reset transistors in all pixels in a conductive state and executes a first conversion gain reset readout processing HSR, stores an AD conversion code with respect to a first readout reset, signal HCGVRST in a memory part, then, in a transfer period PT1, holds the transfer transistors in all pixels in a conductive state to transfer the accumulated charges in photodiodes PD1 to FD1 to thereby execute a global shutter operation accumulating overflowed charges in storage capacitors CS1. The reading part, when reading each row, executes a first conversion gain signal readout processing, a second conversion gain signal readout processing, and a second conversion gain reset readout processing in order. Due to this, it becomes possible to realize digital pixels provided with a global shutter function at a small pixel pitch.
    Type: Application
    Filed: November 6, 2018
    Publication date: May 16, 2019
    Applicant: Brillnics Inc.
    Inventor: Toshinori Otaka
  • Publication number: 20190141270
    Abstract: A comparator in an AD conversion part performs, under the control of reading part, a first comparison processing outputting a digitized first comparison result signal with respect to a voltage signal corresponding to an overflow charge overflowing from a PD1 to an FD1 in an integration period and a second comparison processing outputting a digitized second comparison result signal with respect to a voltage signal corresponding to a accumulated charge of the PD1 transferred to the FD1 in a transfer period after the integration period and, in the first comparison processing, starts an AD conversion processing comparing the voltage signal of the output buffer part and the reference voltage and outputting the digitized comparison result signal with a delay from the starting time of the first comparison processing. The comparator lowers a power consumption and suppresses an influence of a dark current of the FD and deterioration of an image.
    Type: Application
    Filed: October 30, 2018
    Publication date: May 9, 2019
    Applicant: Brillnics Inc.
    Inventors: Toshinori Otaka, Naoto Yasuda, Yusuke Sawai
  • Publication number: 20190132539
    Abstract: A comparator in an AD conversion part, under the control of a reading part, performs a first comparison processing outputting a digitized first comparison result signal with respect to a voltage signal corresponding to an overflow charge overflowing from a PD1 to an FD1 in an integration period, and a second comparison processing outputting a digitized second comparison result signal with respect to a voltage signal corresponding to a accumulated charge of the PD1 transferred to the FD1 in a transfer period after the integration period and, in the first comparison processing, the period of the first comparison processing is divided into a plurality of sub periods and, in each of the sub periods, the comparator performs an AD conversion processing comparing the voltage signal of the output buffer part and the reference voltage and outputting the digitized comparison result signal.
    Type: Application
    Filed: October 23, 2018
    Publication date: May 2, 2019
    Applicant: Brillnics Inc.
    Inventors: Toshinori Otaka, Kazuya Mori
  • Publication number: 20190124285
    Abstract: A comparator in an AD conversion part, under the control of a reading part, performs a first comparison processing outputting a digitized first comparison result signal with respect to a voltage signal corresponding to an overflow charge overflowing from a photodiode PD1 to FD1 in an integration period and performs a second comparison processing outputting a digitized second comparison result signal with respect to a voltage signal corresponding to an accumulated charge of the photodiode PD1 transferred to the FD1 after a transfer period after the integration period, and a signal processing part performs combinational processing applying FWC information and joining a first AD conversion transfer curve TC1 corresponding to the first comparison processing and a second AD conversion transfer curve TC2 corresponding to the second comparison processing. Thus, it is possible to smoothly switch (connect) a plurality of signals to be combined and to suppress deterioration of an image.
    Type: Application
    Filed: October 18, 2018
    Publication date: April 25, 2019
    Applicant: Brillnics Inc.
    Inventor: Toshinori Otaka
  • Publication number: 20190098232
    Abstract: A solid-state imaging device, in which a signal holding part can hold a signal with respect to a voltage signal corresponding to an accumulated charge in a photoelectric conversion element of a photodiode PD1 which is transferred to an output node of a floating diffusion FD1 in a transfer period after an integration period and a signal with respect to a voltage signal corresponding to an overflow charge overflowing to the output node of the floating diffusion FD1 from at least the photodiode PD1 in any period among the photoelectric conversion element of the photodiode PD1 and the storage capacity element of the storage capacitor. Due to this, substantially, it becomes possible to realize a broader dynamic range and higher frame rate.
    Type: Application
    Filed: September 26, 2018
    Publication date: March 28, 2019
    Applicant: Brillnics Inc.
    Inventors: Kazuya Mori, Toshinori Otaka, Isao Takayanagi
  • Publication number: 20190098242
    Abstract: An AD conversion part has a comparator for performing comparison processing comparing a voltage signal read out by a photoelectric converting and reading part and a reference voltage and outputting a digitalized comparison result signal, the comparator, under the control by a reading part, performs first comparison processing for outputting a digitalized first comparison result signal with respect to a voltage signal corresponding to an overflow charge overflowing from a photodiode PD1 to a floating diffusion FD1 in an integration period and second comparison processing for outputting a digitalized second comparison result signal with respect to a voltage signal corresponding to an accumulated charge of the photodiode PD1 transferred to the floating diffusion FD1 in a transfer period after the integration period. Due to this, it becomes possible to substantially realize a broader dynamic range and higher frame rate.
    Type: Application
    Filed: September 26, 2018
    Publication date: March 28, 2019
    Applicant: Brillnics Inc.
    Inventors: Kazuya Mori, Toshinori Otaka, Isao Takayanagi, Junichi Nakamura, Naoto Yasuda
  • Publication number: 20180115726
    Abstract: In a solid-state imaging device, a first multiplexer array 70 is configured so that a plurality of column outputs CLM (0 to 10 . . . ) of the pixel portion 20 are formed into a plurality of groups GRP1a-1d, GRP2a-2d . . . and includes a plurality of shuffle encoders 71-0 to 71-7 . . . capable of shuffling the plurality of column outputs CLM0 to 10 . . . belonging to the groups. Further, it is configured so that, between the adjoining shuffle encoders 71, at least one column output, e.g.
    Type: Application
    Filed: April 13, 2016
    Publication date: April 26, 2018
    Applicant: Brillnics Inc.
    Inventor: Norio Yoshimura
  • Publication number: 20180115723
    Abstract: A solid-state imaging device 10 includes a pixel portion 20 in which a plurality of pixels including photodiodes are arranged in rows and columns, a reading part 90 for reading pixel signals from the pixel portion, and a key generation part 82 which generates a unique key by using at least one of pixel fluctuation information or reading part fluctuation information. According to this configuration, the tamper resistance of the unique key can be secured and consequently alteration and falsification of images can be prevented.
    Type: Application
    Filed: March 18, 2016
    Publication date: April 26, 2018
    Applicants: Brillnics Inc., The Ritsumeikan Trust
    Inventors: Isao Takayanagi, Shunsuke Tanaka, Shinichiro Matsuo, Shunsuke Okura, Shusuke Iwata, Takeshi Fujino, Mitsuru Shiozaki, Takeshi Kumaki, Takaya Kubota, Masayoshi Shirahata
  • Publication number: 20180091754
    Abstract: A pixel portion includes a first pixel array in which a plurality of photoelectric conversion reading parts of first pixels are arranged in a matrix, a holding part array in which a plurality of signal holding parts of first pixels are arranged in a matrix, and a second pixel array in which a plurality of photoelectric conversion reading parts of second pixels are arranged in a matrix, wherein, at the time of a rolling shutter mode, readout signals of the photoelectric conversion reading parts of the first pixels and the second pixels are immediately output to a first vertical signal line without following a bypass route and, at the time of a global shutter mode, held signals of the signal holding parts of the first pixels are output to a second vertical signal line. Due to this, a solid-state imaging device can prevent complication of the configuration.
    Type: Application
    Filed: September 28, 2017
    Publication date: March 29, 2018
    Applicant: Brillnics Inc.
    Inventors: Shunsuke Okura, Toshinori Otaka, Junichi Nakamura
  • Publication number: 20180054576
    Abstract: A solid-state imaging device where when the charge from a photodiode PD11 is small, all of the charge is transferred to the feedback capacitor to obtain an output voltage amplified with a high gain due to a mirror effect created by a CTIA circuit including an amplifier arranged in a readout circuit and a feedback capacitor, while when the CTIA circuit is saturated, due to automatic reduction of the mirror effect, the remaining excessive charge is moved to a floating diffusion FD11 having a larger capacitance to obtain an output voltage amplified with a low gain and where the obtained voltage is simultaneously output from the pixel and taken into a column sampling circuit. Due to this, a low-luminance signal can be read out with a high gain, a high-luminance signal can be read out with a low gain suppressing saturation, and in addition, signals of a high gain and low gain can be obtained by two reading operations. Further, it becomes possible to improve the lowest object illuminance performance.
    Type: Application
    Filed: August 16, 2017
    Publication date: February 22, 2018
    Applicant: Brillnics Inc.
    Inventor: Toshinori Otaka
  • Publication number: 20170230598
    Abstract: A solid state imaging device has: a photosensitive part containing a plurality of charge transfer parts that transfer, in column units, the signal charges of a plurality of photoelectric conversion elements disposed in a matrix; a conversion/output unit that converts, to an electrical signal, the signal charges forwarded by the charge transfer parts; a peripheral circuit part that performs a predetermined process with respect to the electrical signals from the conversion/output part; a relay part that relays the forwarding to the peripheral circuit part of the electrical signal from the conversion/output part; a first substrate where a photosensitive part and the conversion/output part are formed; and a second substrate where the peripheral circuit part is formed. The first and second substrates are stacked together, and the relay part electrically connects the conversion/output part formed at the first substrate to the peripheral circuit part formed at the second substrate.
    Type: Application
    Filed: July 9, 2015
    Publication date: August 10, 2017
    Applicant: Brillnics Inc.
    Inventors: Isao Takayanagi, Shunsuke Tanaka, Kazuya Mori, Katsuhiko Ariyoshi, Shinichiro Matsuo
  • Publication number: 20170162625
    Abstract: This solid-state imaging device 100 has: a photosensitive part that includes pixel portions 211, which are disposed in a matrix, and charge transfer parts 212 for transferring, by the column, the signal charge of the pixel portions; a plurality of charge storage parts 220 that accumulate the signal charges transferred by the plurality of charge transfer parts of the photosensitive part; a relay part 240 that relays the transfer of the signal charges transferred by the plurality of charge transfer parts to each charge storage part; an output part 230 that outputs the signal charges of the plurality of charge storage parts as electric signals; a first substrate 110 at which the photosensitive unit 210 is formed; and a second substrate 120 at which the charge storage part 220 and output unit 230 are formed.
    Type: Application
    Filed: July 9, 2015
    Publication date: June 8, 2017
    Applicant: Brillnics Inc.
    Inventors: Isao Takayanagi, Shunsuke Tanaka, Kazuya Mori, Katsuhiko Ariyoshi, Shinichiro Matsuo