Abstract: To derive a clock embedded in a digital data stream, a variable data rate synchronizer includes a data rate estimator that derives an estimate of the data rate of data contained in the digital data signal, and a frequency estimator that derives an estimate of the frequency of the output of a voltage controlled oscillator. A phase lock loop includes a phase detector to which the digital data signal and the output of the voltage controlled oscillator are coupled and has an output coupled to a sweepable loop filter. The output of the loop filter is coupled to the voltage controlled oscillator. During an initital frequency acquisition mode, the sweep controller sequentially varies an analog voltage applied to the voltage controlled oscillator, until the estimate of the data rate effectively corresponds to the estimate of the frequency of the output of the voltage controlled oscillator.

Abstract: A data and clock recovery arrangement, for a high speed fiber optic digital communication system in which a serial digital bit stream is pre-scramble encoded by interleaving complementary pairs of overhead bits between successive groups of data bits, and then scrambled and transmitted to a receive site, comprises a data rate independent variable bit rate synchronizer, a descrambler and a decoder. The data rate independent variable bit synchronizer processes the received scrambled and encoded digital bit stream to derive a variable data rate synchronization clock signal. The synchronizer is capable of accepting any data rate within the operational data clock signal range of the system, and automatically tunes itself to the data clock signal embedded in the received scrambled and encoded serial data stream, so as to output respective scrambled and encoded serial data and clock signals.

Abstract: A modulation drive current control loop for a digitally modulated laser diode uses the small signal, square-law portion of an RF signal diode detection circuit to adjust the magnitude of laser modulation drive current, and compensate for variations in temperature and aging of the laser diode. Operating the RF signal detector diode as a non-switched device, in its square-law region, provides several advantages over large signal, switched, linear region devices. When a detector diode is operated in the large signal, switched, linear region, its output depends upon the reduced slope beyond the `knee` region of the curve, so that the diode functions essentially as a switch. In such a large signal detection mode, the diode conducts during only a portion of the input cycle, with its output voltage following peaks of the input signal waveform in accordance with a linear relationship between input voltage and output voltage.

Abstract: A prescramble encoding mechanism divides a data word into a plurality of sequences of data bits for transmission over a fiber optic communication link. Complementary versions of control bits and odd and even parity bits are interleaved between the bit parallel data and control signals, divides a parallel data word possible series of consecutive bits of the same logical state is less than a predetermined number related to the length of the data bit sequences and to placement of the complementary control bits and even and odd parity bits. The data frame is then scrambled prior to transmission over the fiber optic link. Depending on the exact nature of the scrambling and descrambling process, a single-bit link error may produce a plurality of bit errors in the descrambled frame.