Abstract: Disclosed is a false-link protection circuit comprising at least one native switch coupled between a communication terminal of a first differential switch and a communication terminal of a second differential switch. The at least one native switch is configured to provide an attenuation path for a pulse link signal received by either communication terminal when the first and second differential switches are in a powered down state. According to one embodiment, a method to attenuate a pulse link signal comprises activating a native switch of a false-link protection circuit by powering down first and second differential switches, receiving a pulse link signal at a communication terminal of one of the first and second differential switches, and attenuating the pulse link signal by diverting it through the false-link protection circuit when the first and second differential switches are in a powered down state.

Abstract: Systems and methods that provide transmission control protocol (TCP) offloading and uploading are provided. In one example, a multiple stack system may include a software stack and a hardware stack. The software stack may be adapted to process a first set of TCP packet streams. The hardware stack may be adapted to process a second set of TCP packet streams and may be coupled to the software stack. The software stack may be adapted to offload one or more TCP connections to the hardware stack. The hardware stack may be adapted to upload one or more TCP connections to the software stack. The software stack and the hardware stack may process one or more TCP connections concurrently.

Abstract: A receiver includes an antenna array that generates a plurality of received signals from at least a first remote transmitter and a second remote transmitter, the antenna array having a beam pattern that is controllable based on at least one control signal. A plurality of receiver sections process the plurality of received signals to generate a plurality of down-converted signals.

Abstract: Systems for recovering communicated information in a communication system are disclosed and may include at least one digitizer for digitizing an analog received signal comprising the communicated information, thereby creating a digital received signal. The system may include at least one filter for bandwidth-limiting at least a portion of the digital received signal. At least one feed forward equalizer may be used for equalizing at least a portion of the bandwidth-limited signal to create an equalized signal. At least one converter for creating a data signal according to at least the equalized signal. At least one soft decision circuit for creating a soft decision signal according to the data signal. The soft decision circuit may cancel at least a portion of the equalized signal.

Abstract: System and method for decoding digital video data. The decoding system employs hardware accelerators that assist a core processor in performing selected decoding tasks. The hardware accelerators are configurable to support a plurality of existing and future encoding/decoding formats. The accelerators are configurable to support substantially any existing or future encoding/decoding formats that fall into the general class of DCT-based, entropy decoded, block-motion-compensated compression algorithms. The hardware accelerators illustratively comprise a programmable entropy decoder, an inverse quantization module, a inverse discrete cosine transform module, a pixel filter, a motion compensation module and a de-blocking filter. The hardware accelerators function in a decoding pipeline wherein at any given stage in the pipeline, while a given function is being performed on a given macroblock, the next macroblock in the data stream is being worked on by the previous function in the pipeline.

Abstract: A handheld wireless communication device (HWCD) establishes an ad hoc network comprising interconnected networks for a user. The HWCD gains access to content on a first device and controls communication of the content from the first device via the HWCD to a second device. The HWCD enables the second device to consume the content. The content may be streamed from the first device via the HWCD to the second device. The first device is a service provider network device or other network device. The access may be authenticated and/or secure. Secure access to the content is extended from the first device to the second device. The ad hoc network is configured and/or reconfigured until communication is complete. The HWCD comprises multiple wireless interfaces. The ad hoc network comprises a PAN, WLAN, WAN and/or cellular network. The HWCD may hand-off among base stations during communication of the content.

Abstract: Methods and systems for wireless communication are disclosed and may include controlling a loading and/or a charging of a battery source in each earpiece of the wireless stereo headset. The loading control may include switching between the battery sources powering the headset. A remaining power level may be monitored for each of the battery sources. Both earpieces in the headset may be powered utilizing one or both of the battery sources. One of the earpieces in the headset may be powered utilizing one of the battery sources. A total usage time may be stored for each of the battery sources. The loading and charging of the battery sources may be controlled by equalizing the total usage time for each of the battery sources. The earpieces in the headset may be coupled via a tether line, or may be coupled wirelessly.

Abstract: Certain aspects of a method and system for host bus adapter assisted storage virtualization are disclosed. Aspects of one method may include loading storage virtualization functionality into one or more of: a storage driver, a network driver, a network interface card (NIC), and a host bus adapter. A SCSI request may be translated to obtain physical target information utilizing a translation table located on one or more of: the storage driver, the network driver, the NIC and the host bus adapter. At least a portion of a plurality of the translated SCSI requests may be cached on the host bus adapter or the NIC.

Abstract: Characterizing channel response using data tone decision feedback. In addition, to pilot tones which may be existent within an orthogonal frequency division multiplexing (OFDM) signal, one or more data tones within that same signal may be employed to assist with channel estimation (alternatively, detection). Once a data tone qualifies as a pseudo-pilot tone, it may be used with the pilot tones for channel estimation. A qualifier considers slicer error associated with hard decisions for a data tone to determine if it is a candidate for assistance within channel estimation. A frame within an OFDM signal may, in one situation, include no pilot tones at all, and a previously calculated channel estimate may be used to process that frame. In addition, fewer pilot tones than needed to perform accurate channel estimation (based on the channel delay spread) may be employed by using one or more pseudo-pilot tones (e.g., qualified data tones).

Abstract: Flexible rate matching. No constraints or restrictions are placed on a sending communication device when effectuating rate matching. The receiving communication device is able to accommodate received transmissions of essentially any size (e.g., up to an entire turbo codeword that includes all systematic bits and all parity bits). The receiving communication device employs a relatively small-sized memory to ensure a lower cost, smaller sized communication device (e.g., handset or user equipment such as a personal wireless communication device). Moreover, incremental redundancy is achieved in which successive transmissions need not include repeated information therein (e.g., a second transmission need not include any repeated information from a first transmission). Only when reaching an end of a block of bits or codeword to be transmitted, and when wrap around at the end of such block of bits or codeword occurs, would any repeat of bits be incurred within a later transmission.

Abstract: A small form factor USB Bluetooth dongle includes a printed circuit board (PCB), a USB contact area, and a radio frequency (RF) transceiver die. The PCB includes a first primary surface and a second primary surface. The USB contact area is fabricated on the first primary surface. The RF transceiver die is mounted on the second primary surface, wherein the RF transceiver is in accordance with Bluetooth.

Abstract: A system, method, and apparatus for a multiple data rate communication system is presented herein. The communication system receives data samples that are either sampled at a narrowband rate or a wideband rate and provides various functions and services, such as echo cancellation, DTMF detection and generation, and call discrimination. For wideband signals, a down-sampled signal is provided for each of the foregoing function and service. The output of the function or services is then recombined with the wideband signal.

Abstract: According to one disclosed embodiment, an integrated one-time programmable (OTP) semiconductor device pair includes a split-thickness dielectric under an electrode and over an isolation region formed in a doped semiconductor substrate, where a reduced-thickness center portion of the dielectric forms, in conjunction with the isolation region, programming regions of the OTP semiconductor device pair, and where the thicker, outer portions of the dielectric form dielectrics for transistor structures. In one embodiment, the split-thickness dielectric comprises a gate dielectric. In one embodiment, multiple OTP semiconductor device pairs are formed in an array that minimizes the number of connections required to program and sense states of specific OTP cells.

Abstract: Direct detection of wireless interferers in a communication device for multiple modulation types. One or more radios implemented within a communication device is/are operative to receive and process wireless communications. A wireless communication signal is processed to extract symbols there from. Various symbols groups are processed in accordance with correlation processing to identify potential interferers (e.g., other communication devices using common portions of frequency spectra). Alternatively, matched filter processing (e.g., using a Barker matched filter in some embodiments) operates on the various symbol groups to identify some potential interferers. Various combinations of correlation processing and matched filter processing may be employed in other instances (e.g., using any of a desired means of comparison, combining, etc.) in considering interferers identified in accordance with each of these two means.

Abstract: According to one embodiment of the invention, a network device for processing data on a data network, includes a plurality of ports, where at least one higher speed port of the plurality of ports is configured to send and receive data between inter-networked devices, a memory management unit, in communication with and controlling memory external to the network device, configured store data on and retrieve data from the memory and a parser, in communication with the plurality of ports and the memory management unit, configured to parse the data received from the data network. The parser includes at least two independent parser units, with one of the independent parser units parsing data received by the at least one higher speed port and another of the independent parser units parsing data received by a remainder of the plurality of ports.

Abstract: Aspects of a method and system for energy efficient networking over a serial communication channel are provided. In this regard, one or more circuits in an Ethernet PHY that communicates over one or more serial communication channels may transmit and/or receive physical layer signals to maintain and/or refresh synchronization and/or training parameters while operating in an energy saving mode. The Ethernet PHY may transition out of the energy saving mode upon transmitting and/or receiving a wake sequence via the serial communication channel(s), where the wake sequence comprises one or more deterministic forward error correction (FEC) block in instances that FEC is utilized for communications via the serial communication channel(s). The one or more circuits in the Ethernet PHY may be operable to perform forward error correction (FEC) functions and one or more of the FEC functions may be disabled while remaining ones of the FEC functions are enabled.

Abstract: A mixed-height cell library for designing integrated circuits is provided. The mixed-height cell library includes a first plurality of cells having a first track height and a second plurality of cells having a second track height that are configured to be coupled to the first plurality of cells at respective power and ground rail lines. A method for mixed-height cell placement and optimization is also provided. The method comprises abutting cells of different track heights to form a plurality of rows of cells by coupling power and ground rails of the cells at a secondary layer that is different from a primary layer that includes active material and determining whether re-ordering cells within rows allows for further compaction of adjacent rows. The method further comprises re-ordering cells within rows so to allow for further compaction of adjacent rows. The method also includes the steps of splitting rows vertically to minimize the distance between the split rows.

Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors with shields to increase circuit Q. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.

Abstract: Overlapping sub-matrix based LDPC (Low Density Parity Check) decoder. Novel decoding approach is presented, by which, updated bit edge messages corresponding to a sub-matrix of an LDPC matrix are immediately employed for updating of the check edge messages corresponding to that sub-matrix without requiring storing the bit edge messages; also updated check edge messages corresponding to a sub-matrix of the LDPC matrix are immediately employed for updating of the bit edge messages corresponding to that sub-matrix without requiring storing the check edge messages. Using this approach, twice as many decoding iterations can be performed in a given time period when compared to a system that performs updating of all check edge messages for the entire LDPC matrix, then updating of all bit edge messages for the entire LDPC matrix, and so on. When performing this overlapping approach in conjunction with min-sum processing, significant memory savings can also be achieved.

Abstract: Aspects of a method and system for an extended range copper transceiver are provided. Reducing the communication rate provided by multi-rate physical (PHY) layer operations in an Ethernet transceiver may extend the range of the Ethernet transceiver over twisted-pair copper cabling from a standard connection length. The Ethernet transceiver may support up to 1 Gbps or up to 10 Gbps transmission rate over copper cabling. The multi-rate PHY layer architecture in the Ethernet transceiver may support signal-processing operations, such as echo cancellation and/or equalization, which may be applied to the reduced communication rate to enable range extension. The reduced communication rate may be achieved by reducing the symbol rate provided by the multi-rate PHY layer operations. Reducing the communication rate may also enable utilizing greater insertion loss cabling for a standard connection length.