Patents Assigned to Broadcom Corporation
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Patent number: 7199612Abstract: Systems and methods are disclosed for reducing or eliminating hot carrier injection stress in circuits. In one embodiment, the present invention relates to an integrated circuit comprising an IO PAD, an output circuit coupled to at least the IO PAD and a stress circuit. The stress circuit is coupled to at least the output circuit and is adapted to limit a high voltage across the output circuit when the output circuit is enabled, thereby reducing stress on the output circuit. In one embodiment, the stress circuit comprises at least one transistor device (a p-channel device or two stacked p-channel devices, for example) and the output circuit comprises a transistor device (an n-channel device or two stacked n-channel devices).Type: GrantFiled: July 1, 2003Date of Patent: April 3, 2007Assignee: Broadcom CorporationInventors: Kent Oertle, Robert Elio, Duncan McFarland, Darrin Benzer
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Patent number: 7199659Abstract: The invention enables an increase in linear power output ranges in a power amplifier by using an unmatched power amplifier driver in place of a matched power amplifier driver.Type: GrantFiled: September 29, 2004Date of Patent: April 3, 2007Assignee: Broadcom CorporationInventor: Meng-An Pan
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Patent number: 7199664Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: GrantFiled: December 27, 2004Date of Patent: April 3, 2007Assignee: Broadcom CorporationInventors: Klaas Bult, Ramon A. Gomez
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Patent number: 7200370Abstract: A Radio Frequency (RF) power amplifier includes a transconductance stage, an AC coupling element, and a cascode stage. The transconductance stage is adapted to receive an input RF voltage signal and to produce an output RF current signal. The cascode stage is adapted to receive an input RF current signal and to produce an output RF voltage signal. The AC coupling element couples between the transconductance stage and the cascode stage and is operable to AC couple the output RF current signal of the transconductance stage as the input RF current signal of the cascode stage.Type: GrantFiled: March 12, 2004Date of Patent: April 3, 2007Assignee: Broadcom CorporationInventor: Arya Reza Behzad
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Patent number: 7199737Abstract: A system and method for an improved analog front-end system is disclosed. By coupling a switch to the output of a track-and-hold circuit and to the input of a time-discrete circuit, such as an analog-to-digital converter, the time-discrete circuit can be disconnected from the track-and-hold circuit during the track mode of the track-and-hold circuit. This improved system reduces the load of the T/H circuit from the full input capacitance of the time-discrete circuit to the smaller parasitics of the switch thereby providing a T/H circuit with lower power consumption and smaller area while maintaining high speed and high accuracy.Type: GrantFiled: June 2, 2004Date of Patent: April 3, 2007Assignee: Broadcom CorporationInventor: Erol Arslan
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Publication number: 20070069816Abstract: A Class AB voltage-to-current converter includes a plurality of DC coupled transconductance stages that produce a linearized output and a biasing circuit. The biasing circuit generates a primary bias voltage that is greater than a generated secondary bias voltage. As such, the first transconductance stage becomes active before the second transconductance stage with respect to the magnitude of a differential input voltage, thereby allowing the transconductance of the secondary transconductance stage to be added (or subtracted) from the transconductance of the primary stage to improve the overall transconductance of the Class AB voltage-to-current converter. As each of the plurality of transconductance stages is biased differently from the others, the various transconductance stages are biased on to differing amounts based upon the biasing signals as well as the input signal.Type: ApplicationFiled: November 14, 2006Publication date: March 29, 2007Applicant: Broadcom Corporation, a California CorporationInventor: Arya Behzad
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Publication number: 20070070986Abstract: A telephony system and method is provided that reduces delay and provides better utilization of upstream bandwidth in delivering packet telephony services to a plurality of subscriber lines via a cable modem system. An exemplary system includes a plurality of voice processing modules, a host processor, and a buffer. Each voice processing module receives digital voice signals from a separate set of subscriber lines, compresses the digital voice signals to generate a voice packet, and transfers the voice packet to the buffer. The host processor then assembles a packet by concatenating the voice packets and transmits the assembled packet for delivery over a data network. Because the plurality of voice processing modules process the voice packets in parallel, delay is reduced in the assembly and transmission of the assembled packet.Type: ApplicationFiled: July 25, 2006Publication date: March 29, 2007Applicant: Broadcom CorporationInventor: Theodore Rabenko
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Publication number: 20070069329Abstract: A semiconductor device exhibiting low parasitic resistance comprises a first substrate characterized by a first resistivity; a second substrate characterized by a second resistivity, a third substrate and a metal element. These substrates form a multi-layer semiconductor device where the second substrate is formed on the first substrate; the third substrate is formed on the second substrate; and the metal element is formed on the third substrate. The second substrate is electrically grounded and is highly doped with acceptor dopant as compared to the first substrate. In this way, the second resistivity is lower than the first resistivity.Type: ApplicationFiled: December 29, 2005Publication date: March 29, 2007Applicant: Broadcom CorporationInventor: Hung-Ming Chien
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Publication number: 20070069818Abstract: A multi-level power amplifier architecture using a multi-tap transformer implemented on a single CMOS integrated circuit wireless communications device is described. By providing a multi-tap transformer for coupling a plurality of power amplifiers to a shared output impedance, such as an antenna, power transmission may be made at different levels while maintaining efficiency. With a multi-tap transformer having “N” taps featuring “N” different impedance levels, each tap may be connected to an amplifier cell which delivers power into the transformer at the tap for coupling to the output load. Any one of the “N” amplifier cells can be turned on at once along with any combination of the “N” amplifier cells.Type: ApplicationFiled: October 26, 2006Publication date: March 29, 2007Applicant: Broadcom CorporationInventors: Iqbal Bhatti, Jesus Castaneda
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Patent number: 7197276Abstract: A downstream adaptive modulation system and method. The downstream adaptive modulation system comprises a wireless access termination system and one or more wireless modems. The wireless access termination system includes a plurality of queues and a parser. The parser parses data traffic onto the plurality of queues. Each queue is associated with a different coding and modulation scheme. Each of the one or more wireless modems receives data traffic from the plurality of queues based on the wireless modem's ability to demodulate and decode the signal from each of the plurality of queues. When a wireless modem experiences a change in signal strength, the present invention enables the wireless modem to adapt to data from other queues to compensate for the change in signal strength. Thus, if the signal strength improves over a period of time, the wireless modem may receive data at a higher order modulation and FEC code rate.Type: GrantFiled: March 15, 2002Date of Patent: March 27, 2007Assignee: Broadcom CorporationInventors: Mark Dale, David Hartman, Anders Hebsgaard
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Patent number: 7196582Abstract: Methods and systems for processing signals are disclosed herein. In one aspect of the invention a circuit for processing signals may comprise a triple well (TW) NMOS transistor coupled to an amplifier core. The TW NMOS transistor may track process and temperature variations (PVT) of at least one NMOS transistor within the amplifier core. A drain of the TW NMOS transistor may be coupled to a first inductor and the first inductor may be coupled to a first voltage source. The first voltage source may generate a standard voltage of about 1.2V. A source of the TW NMOS transistor may be coupled to a second inductor and the second inductor may be coupled to the first voltage source. A gate of the TW NMOS transistor may be coupled to a second voltage source, where the second voltage source may generate a standard voltage of about 2.5V.Type: GrantFiled: October 29, 2004Date of Patent: March 27, 2007Assignee: Broadcom CorporationInventors: Hooman Darabi, Janice Chiu
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Patent number: 7197096Abstract: Systems and methods are disclosed for to compensating reference frequency drift in a communications system having a plurality of modems and a headend, where the system requires critical upstream timing. One embodiment of the method includes learning or determining the relative delay of each modem and reporting each modem's unique delay (relative to the closest modem) to the headend. The method further includes the headend monitoring its own reference for frequency drift, the modem broadcasting pertinent frequency drift information to the modems and adjusting the modems' upstream timing to account for each modem's unique distance (i.e., delay) combined with the broadcast stream of frequency drift information.Type: GrantFiled: April 30, 2002Date of Patent: March 27, 2007Assignee: Broadcom CorporationInventor: Thomas J. Kolze
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Patent number: 7197068Abstract: A method for forming a non-iterative time-domain equalizer (TEQ) and apparatus corresponding thereto. A channel response H(z) is followed by a TEQ response A(z) and a residual output B(z) is chosen so that its degree is less than a cyclic prefix. An error signal is formed so that E(z)=H(z)A(z)?B(z). With a unit input, the error signal is set to zero and B(z)=H(z)A(z). Each signal is expressed as a polynomial, having varying degrees, and a having corresponding coefficients. Once expanded, the coefficients of similar degree can be equated on both sides of the equation. The error signal can then be determined in terms of coefficients corresponding to the TEQ and the residual signal. The coefficients of the channel response can be derived from the channel training estimates. The error signal is minimized and the result is solved for in terms of the desired TEQ coefficients.Type: GrantFiled: November 1, 2005Date of Patent: March 27, 2007Assignee: Broadcom CorporationInventor: Haixiang Liang
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Patent number: 7196415Abstract: An apparatus and method for a low voltage drop and thermally enhanced integrated circuit (IC) package are described. A substantially planar substrate having a plurality of contact pads on a first surface is electrically connected through the substrate to a plurality of solder ball pads on a second surface of the substrate. An IC die having a first surface is mounted to the first surface of the substrate. The IC die has a plurality of I/O pads electrically connected to the plurality of contact pads on the first surface of the substrate. A heat sink assembly is coupled to a second surface of the IC die and to a first contact pad on the first surface of the substrate to provide a thermal path from the IC die to the first surface of the substrate. The heat sink assembly can also provide an electrical path from the IC die to the first surface of the substrate. The heat sink assembly may have one or two heat sink elements to provide thermal and/or electrical connectivity between the IC die and the substrate.Type: GrantFiled: September 25, 2002Date of Patent: March 27, 2007Assignee: Broadcom CorporationInventors: Chong Hua Zhong, Reza-ur Rahman Khan
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Patent number: 7197069Abstract: Various systems and methods providing high speed decoding, enhanced power reduction and clock domain partitioning for a multi-pair gigabit Ethernet transceiver are disclosed. ISI compensation is partitioned into two stages; a first stage compensates ISI components induced by characteristics of a transmitter's partial response pulse shaping filter in a demodulator, a second stage compensates ISI components induced by characteristics of a multi-pair transmission channel in a Viterbi decoder. High speed decoding is accomplished by reducing the DFE depth by providing an input signal from a multiple decision feedback equalizer to the Viterbi based on a tail value and a subset of coefficient values received from a unit depth decision-feedback equalizer. Power reduction is accomplished by adaptively truncating active taps in the NEXT, FEXT and echo cancellation filters, or by disabling decoder circuitry portions, as channel response characteristics allow.Type: GrantFiled: October 8, 2003Date of Patent: March 27, 2007Assignee: Broadcom CorporationInventors: Oscar E. Agazzi, John L. Creigh, Mehdi Hatamian, David E. Kruse, Arthur Abnous, Henry Samueli
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Patent number: 7197690Abstract: Bandwidth efficient coded modulation scheme based on MLC (Multi-Level Code) signals having multiple maps. The use of multiple maps is adapted to various types of coded signals including multi-level LDPC coded modulation signals and other MLC signals to provide for a significant performance gain in the continual effort trying to reach towards Shannon's limit. In the instance of LDPC coded signals, various level LDPC codewords are generated from individual corresponding LDPC encoders. These various level LDPC codewords are arranged into a number of sub-blocks. Encoded bits from multiple level LDPC codewords within each of the sub-blocks are arranged to form symbols that are mapped according to at least two modulations. Each modulation includes a constellation shape and a corresponding mapping. This use of multiple mappings provides for improved performance when compared to encoders that employ only a single mapping.Type: GrantFiled: December 20, 2004Date of Patent: March 27, 2007Assignee: Broadcom CorporationInventors: Ba-Zhong Shen, Hau Thien Tran, Kelly Brian Cameron
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Patent number: 7197548Abstract: For each node, elapsed periodic time intervals are provided and counted since the transmission of a link integrity indication frame, a frame which can be received by all other nodes on the network and which contains a source identifier. Frames are received from a sending node and a node state status and a current received frame source address are maintained during each periodic time interval. Upon expiration of the periodic time interval, if the node state status is not indicative of network traffic and a count of the elapsed periodic time intervals since transmission of a link integrity indication frame is greater than a predefined count limit, a link integrity indication frame is transmitted.Type: GrantFiled: July 19, 2000Date of Patent: March 27, 2007Assignee: Broadcom CorporationInventors: Henry Ptasinski, Tracy Mallory
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Patent number: 7196559Abstract: A multi-modulus divider for high speed applications is provided and may comprise a multistage divider generating a divided signal from an output portion of a divider module for a current stage. The divided signal may be fed back to an input portion of the divider module in the current stage via a reduced feedback delay path. If the input portion of the divider module in the current stage is coupled to the divider module in a previous stage, a first load signal may be communicated from the divider module in the current stage to the divider module in the previous stage. If the divider module in the current stage is coupled to the divider module in the previous stage, the method may further comprise receiving the divided signal from the divider module in the previous stage.Type: GrantFiled: March 21, 2005Date of Patent: March 27, 2007Assignee: Broadcom CorporationInventor: Hung-Ming Chien
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Patent number: 7197044Abstract: A method for managing congestion in a stack of network switches includes the steps of receiving an incoming packet on a first port of a network switch for transmission to a destination port and determining if the destination port of the packet is a monitored port. Thereafter, the method determines a queue status of the destination port, if the destination port is determined to be a monitored port, and preschedules transmission of the incoming packet to the destination port if the destination port is determined to be a monitored port.Type: GrantFiled: March 17, 2000Date of Patent: March 27, 2007Assignee: Broadcom CorporationInventors: Shiri Kadambi, Mohan Kalkunte, Shekhar Ambe
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Patent number: 7197421Abstract: In an RF communication system, aspects of a method for a temperature sensor for transmitter output power compensation may comprise generating an output voltage, which may vary with temperature, from at least one reference voltage, wherein at least one reference voltage may vary proportionally with temperature. The output voltage may be converted to a digital value. The reference voltage may be generated by utilizing a current source to generate a voltage across a resistive load. A control voltage generated from an operational amplifier may control at least one current source. PN junction characteristics of at least one bipolar junction transistor may be utilized to generate an input reference voltage for the operational amplifier. Resistance of at least one resistor, which may be coupled to the bipolar junction transistor and to the operational amplifier, may be adjusted to determine a current level from the current source at a plurality of different temperatures.Type: GrantFiled: November 30, 2004Date of Patent: March 27, 2007Assignee: Broadcom CorporationInventor: Michael (Meng-An) Pan