Patents Assigned to Broadcom Corporation
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Patent number: 7113479Abstract: A network device, which includes a plurality of network ports, a switching unit, a data classification unit, and a rate control unit, is provided. The plurality of network ports is configured to send and receive input data packets. The switching unit is coupled to the plurality of network ports and is configured to switch input data packets from a first port to a second port. The rate control unit is coupled to the switching unit and configured to control a data rate provided to each port of the plurality of network ports. The data classification unit is coupled to the switching unit and to the rate control unit. The data classification unit is configured to classify data packets based on their contents and output a classification to the rate control unit. The rate control unit is configured to perform rate control for input data packets based on the classification of each data packet.Type: GrantFiled: May 31, 2002Date of Patent: September 26, 2006Assignee: Broadcom CorporationInventor: David Wong
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Patent number: 7113221Abstract: Aspects of the invention include a 3:2 pull down detector coupled to a 3:2 cadence processor and a color edge detector coupled to a binder. The binder may be coupled to a 3:2 cadence processor. A filter, which may be a temporal or infinite impulse response filter, may be coupled to the binder. A selector may also be coupled to the 3:2 cadence processor. A memory and a processor may also be coupled to any of the 3:2 pull down detector, the 3:2 cadence processor, the color edge detector, the binder, the filter and said output selector. The selector may select between a filtered deinterlaced output and a reverse 3:2 pull down output.Type: GrantFiled: August 4, 2003Date of Patent: September 26, 2006Assignee: Broadcom CorporationInventors: Patrick Law, Darren Neuman
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Patent number: 7113754Abstract: A signal power detector includes an input coupling circuit a rectifying operational amplifier, and a charge pump. The input coupling circuit is operably coupled to receive a signal and to convert the signal into a first input and a rectifying input. The rectifying operational amplifier is operably coupled to receive the first input and the rectifying input and to produce therefrom a rectified output signal that represents a peak of the received signal. The charge pump converts the rectified output into a corresponding current, wherein the corresponding current represents power of the signal.Type: GrantFiled: August 21, 2003Date of Patent: September 26, 2006Assignee: Broadcom CorporationInventor: Hung-Ming (Ed) Chien
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Patent number: 7113540Abstract: Multi-Input-Multi-Output (MIMO) Optimal Decision Feedback Equalizer (DFE) coefficients are determined from a channel estimate h by casting the MIMO DFE coefficient problem as a standard recursive least squares (RLS) problem and solving the RLS problem. In one embodiment, a fast recursive method, e.g., fast transversal filter (FTF) technique, then used to compute the Kalman gain of the RLS problem, which is then directly used to compute MIMO Feed Forward Equalizer (FFE) coefficients gopt. The complexity of a conventional FTF algorithm is reduced to one third of its original complexity by choosing the length of a MIMO Feed Back Equalizer (FBE) coefficients bopt (of the DFE) to force the FTF algorithm to use a lower triangular matrix. The MIMO FBE coefficients bop are computed by convolving the MIMO FFE coefficients gopt with the channel impulse response h. In performing this operation, a convolution matrix that characterizes the channel impulse response h extended to a bigger circulant matrix.Type: GrantFiled: May 24, 2002Date of Patent: September 26, 2006Assignee: Broadcom CorporationInventors: Nabil R. Yousef, Ricardo Merched
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Patent number: 7114010Abstract: Techniques for controlling and managing network access are used to enable a wireless communication device to selectively communicate with several wireless networks. A portable communication device constructed according to the invention can communicate with different networks as the device is moved through the areas of coverage supported by the different networks. As a result, the device can take advantage of services provided by a particular network when the device is within the area of coverage provided by that network. Thus, the device can selectively switch to networks that provide, for example, high speed Internet access, different quality of service, low cost service and/or different services (e.g., voice, data, multimedia, etc.). A multi-mode controller in the device may be used to alternately poll different networks to determine whether the device is within the area of coverage of a network and to selectively establish communications with those networks.Type: GrantFiled: May 25, 2001Date of Patent: September 26, 2006Assignee: Broadcom CorporationInventors: Jeyhan Karaoguz, Nambi Seshadri
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Patent number: 7112998Abstract: A system and method for level shifting a core, lower voltage in a one-stage level shift device to produce a higher, driving voltage. The system includes a first device that optimally functions with a first voltage and that outputs the first voltage. The system also includes a one-stage level shift device that receives the first voltage and shifts the first voltage to a second voltage without an intermediate voltage, the second voltage being higher than the first voltage. The system also includes a second device that receives the second voltage to optimally function. In some cases, the first voltage can be a periodic wave such that the higher voltage is produced with one portion of the level shift device during a first portion of the wave and another portion of the level shift device during a second portion of the wave.Type: GrantFiled: March 3, 2005Date of Patent: September 26, 2006Assignee: Broadcom CorporationInventor: Janardhanan S. Ajit
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Patent number: 7113498Abstract: A method and apparatus for communicating between devices is described. In one embodiment, the method comprises running two or more instances of a switch MAC sublayer on a switch and managing the two or more instances of the switch MAC sublayer as multiple logical access points inside the switch.Type: GrantFiled: June 5, 2002Date of Patent: September 26, 2006Assignee: Broadcom CorporationInventor: Zeljko Bajic
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Patent number: 7114024Abstract: A method and apparatus for managing defects in a memory, wherein the method includes the steps of testing a plurality of memory locations to determine an inoperable memory location and moving a memory address corresponding to the inoperable memory location to a first position in a list of available memory addresses. The method further includes the steps of incrementing an address pointer to a second position in the list of available addresses indicating a next available memory address in the list of available addresses, wherein said step of incrementing an address pointer to a second position operates to remove the memory address stored in the first position from the list of available memory addresses.Type: GrantFiled: August 3, 2004Date of Patent: September 26, 2006Assignee: Broadcom CorporationInventor: Joseph Herbst
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Patent number: 7113744Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.Type: GrantFiled: October 18, 2000Date of Patent: September 26, 2006Assignee: Broadcom CorporationInventors: Shervin Moloudi, Maryam Rofougaran
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Patent number: 7114043Abstract: An apparatus comprises a first plurality of buffers configured to store operations belonging to a first virtual channel and a control circuit coupled to the first plurality of buffers. The first virtual channel includes first operations and second operations, wherein each of the first operations depend on at least one of the second operations during use. A first number of the first operations is less than or equal to a maximum. It is ambiguous, for a first received operation in the first virtual channel, whether the first received operation is one of the first operations or the second operations. A total number of the first plurality of buffers exceeds the maximum.Type: GrantFiled: May 9, 2003Date of Patent: September 26, 2006Assignee: Broadcom CorporationInventor: Joseph B. Rowlands
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Patent number: 7112853Abstract: An ESD protection system providing extra headroom at an integrated circuit (IC) terminal pad. The system includes an ESD protection circuit having one or more first diodes coupled in series between the supply voltage and terminal pad, and a second diode coupled to ground. One or more third diodes are coupled in series between the terminal pad and second diode, and are configured to permit a voltage on the interconnection nodes between the one or more third diodes and second diode different from ground. The one or more third diodes include an n+ on an area of P-substrate. A deep N-well separates the area of P-substrate from a common area of P-substrate, which is coupled to ground. The allowable signal swing at the terminal pad is increased to greater than supply voltage plus 1.4 V. The ESD protection circuit is useful for, among other things, relatively low supply voltage ICs.Type: GrantFiled: December 17, 2003Date of Patent: September 26, 2006Assignee: Broadcom CorporationInventors: Hung-Sung Li, Laurentiu Vasiliu
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Patent number: 7113004Abstract: A sense amplifier adapted to sense an input signal on global bitlines, having an amplifier offset cancellation network and an offset equalization network. The amplifier offset cancellation network mitigates an inherent offset signal value, a dynamic offset signal value, or both, yet produces a residual offset signal value, which is substantially eliminated by the offset equalization network. The sense amplifier also can include an isolation circuit to isolate the sense amplifier from the corresponding global bitlines when the sense amplifier is unused. Also, a charge-sharing circuit is used to share charge between the bitlines when the sense amplifier is activated, thus producing a limited voltage swing on the bit lines. The sense amplifier uses an amplifier offset cancellation network having multiple precharge-and-balance transistors, and an offset equalization network having at least one balancing transistor.Type: GrantFiled: August 24, 2004Date of Patent: September 26, 2006Assignee: Broadcom CorporationInventors: Esin Terzioglu, Morteza Cyrus Afghahi
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Publication number: 20060209903Abstract: An apparatus for maintaining synchronization with a plurality of asynchronous communication links includes a first counter that generates a first local network clock, and a second counter that generates a second local network clock. The apparatus also includes an offset controller coupled with the first counter and coupled with the second counter, the offset controller configured to load a current network clock value of a first network clock of a first communication link into the first counter, and to load a current network clock value of a second network clock of a second communication link into the second counter. The apparatus further includes a drift controller coupled with the first counter and with the second counter, the drift controller configured to correct a drift between the first local network clock and the first network clock and to correct a drift between the second local network clock and the second network clock.Type: ApplicationFiled: May 22, 2006Publication date: September 21, 2006Applicant: Broadcom CorporationInventor: Ayse Findikli
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Patent number: 7110135Abstract: Systems and methods of printer resource sharing in a communication network are provided. In one embodiment, the system may comprise, for example, at least one communication device, a communication network, print server software, and at least one personal printer resource. The communication device may be deployed at a location. The communication network may be communicatively coupled to that communication device. The print server software may receive from the communication device via the communication network a request for printing of information content. The print server software may respond by coordinating the printing of the information content. The at least one personal printer resource may be communicatively coupled to the at least one communication device. The print server software may reside outside of the at least one personal printer resource, and the at least one personal printer resource may be accessed for printing by the communication device via the communication network.Type: GrantFiled: September 30, 2003Date of Patent: September 19, 2006Assignee: Broadcom CorporationInventors: Jeyhan Karaoguz, James D. Bennett
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Patent number: 7110742Abstract: A low noise amplifier includes an input transistor, an inductor, and a current sink. The input transistor includes a gate, a drain, and a source, wherein the gate of the input transistor is operably coupled to receive an input radio frequency (RF) signal. The inductor includes a first node and a second node, wherein the first node of the inductor is operably coupled to a power supply and the second node of the inductor is operably coupled to the drain of the input transistor to provide an output of the low noise amplifier. The current sink includes a first node and a second node, wherein the first node of the current sink is operably coupled to the source of the input transistor and the second node of the current sink is operably coupled to a circuit ground, wherein a real component of input impedance of the low noise amplifier is substantially constant when the low noise amplifier is in the off mode as when the low noise amplifier is in the on mode.Type: GrantFiled: March 16, 2004Date of Patent: September 19, 2006Assignee: Broadcom CorporationInventor: Razieh Roufoogaran
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Patent number: 7111104Abstract: A system for connecting multiple repeaters into a single collision domain comprising a first repeater, a second repeater and a stacking bus. The first repeater has a plurality of network ports. The second repeater also has a plurality of network ports. The stacking bus connects the first repeater and the second repeater and is configured to relay status signals between the first and said second repeaters.Type: GrantFiled: April 21, 2005Date of Patent: September 19, 2006Assignee: Broadcom CorporationInventors: Xi Chen, Brian Chang
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Patent number: 7111111Abstract: Methods of optimizing a plurality of numerically controlled delay lines (NCDLS) in a DDR memory controller are presented herein. In one embodiment, a method may comprise, for example, one or more of the following: acquiring a plurality of statistics, the plurality of statistics defining an operating region for the DDR memory controller; and calculating optimal values for the plurality of NCDLs, the optimal values calculated using the plurality of statistics.Type: GrantFiled: November 18, 2003Date of Patent: September 19, 2006Assignee: Broadcom CorporationInventors: Darren Neuman, Sathish Kumar Radhakrishnan, Jeffrey Fisher, Joshua Stults, Nitin Borle, Kaushik Bhattacharya
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Patent number: 7110309Abstract: A single-port hierarchical memory structure including memory modules having memory cells; hierarchically-coupled local and global sense amplifiers; hierarchically-coupled local and global row decoders; and a predecoding circuit coupled with selected global row decoders. The predecoding circuit is disposed to provide predecoding at a speed substantially faster than the predetermined memory access speed of the memory structure, allowing access to a memory cell at least twice during the memory access period, thereby providing dual-port functionality. A WRITE-AFTER-READ operation without a separate, interposed PRECHARGE cycle, is completed within one memory access cycle of the hierarchical memory structure. The method includes locally selecting the first memory location of a first datum; locally sensing the first datum (i.e.Type: GrantFiled: July 2, 2003Date of Patent: September 19, 2006Assignee: Broadcom CorporationInventors: Esin Terzioglu, Morteza Cyrus Afghahi
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Patent number: 7110434Abstract: A relatively straight-forward implemented, and computationally efficient approach of selecting a predetermined number of unused codes is used to perform weighted linear combination selectively with each of the input spread signals in a multiple access communication system. If desired, the predetermined number of unused codes is always the same in each implementation. Alternatively, the predetermined number of unused codes are selected from within a reordered code matrix using knowledge that is shared between the two ends of a communication system, such as between the CMs and a CMTS. While the context of an S-CDMA communication system having CMs and a CMTS is used, the solution is generally applicable to any communication system that seeks to cancel narrowband interference. Several embodiments are also described that show the generic applicability of the solution across a wide variety of systems.Type: GrantFiled: May 8, 2002Date of Patent: September 19, 2006Assignee: Broadcom CorporationInventors: Bruce J. Currivan, Thomas J. Kolze, Gottfried Ungerboeck, Nabil R. Yousef
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Patent number: 7111117Abstract: A method to expand a RAID subsystem from a first array of disk drives to a second array of disk drives. The first array includes a set of data disk drives storing old data and spare space, and the second array includes the first array and at least one new disk drive. First, the old data are distributed among the set of data disk drives and at least one new disk drive while, at the same time, new data are mapped to the spare space. Upon completion of the distribution, the new data are copied from the spare space to the set of data disk drives and at least one new disk drive to enable concurrent expansion of the first array while accessing the old and the new data.Type: GrantFiled: December 19, 2001Date of Patent: September 19, 2006Assignee: Broadcom CorporationInventors: Chris R. Franklin, Jeffrey T. Wong