Abstract: Method and system encodes a signal according to a code rate that includes a ratio of uncoded bits to coded bits. An outer Reed-Solomon encoder encodes the signal into codewords. An interleaver converts the codewords into bits of frames for wireless transmission. An inner encoder executes a convolutional code to generate an encoded signal. The encoded signal is transmitted over a plurality of subcarriers associated with a wide bandwidth channel. The convolutional code is punctured and code states are added by the inner encoder to improve the code rate.

Abstract: Presented herein are systems, methods, and apparatus for real-time high definition television encoding. In one embodiment, there is a method for encoding video data. The method comprises downscaling at least one original reference picture; classifying the content of the macroblocks of the picture; and selecting a spatial prediction mode for each of the macroblocks of the picture based on the content classification. If it is determined that a macroblock is to be coded using spatial encoding, the macroblock is coded using the associated prediction mode.

Abstract: An integrated circuit (IC) includes a clock circuit, a processing module, and processing circuitry. The clock circuit is coupled to produce a digital clock signal. The processing module is coupled to determine whether a harmonic component of the digital clock signal having a nominal digital clock rate is within the frequency passband and to provide an indication to the clock circuit to adjust its rate from the nominal digital clock rate to an adjusted digital clock rate when the harmonic component of the digital clock signal is within the frequency passband. The processing circuitry is coupled to process, at the adjusted digital clock rate, the data to produce processed data having a rate corresponding to the nominal digital clock rate and to interpolate, at an interpolation rate, the processed data to produce interpolated processed data having a rate corresponding to the interpolation rate.

Abstract: A system may include a printed circuit board, a first component located on the printed circuit board, the first component having a first unique identifier and a processor located on the printed circuit board, the processor including a one time programming section. The processor may acquire the first unique identifier from the first component and store the first unique identifier in the one time programming section during the first time initialization. Upon subsequent initializations, the processor may acquire the first unique identifier from the first component and compare the first unique identifier to the stored first unique identifier. The processor may allow the subsequent initializations to proceed if the first unique identifier matches the stored first unique. The processor may disallow the subsequent initializations from proceeding if the first unique identifier does not match the stored first unique identifier.

Abstract: One embodiment provides an EPON for transporting RF signals. The system includes a reference clock, an ONU, and an OLT. The ONU includes a mechanism for receiving a frequency and phase-reference signal from the OLT, a mechanism for receiving an RF signal, an ADC for converting the RF signal into a digital signal using a sampling signal associated with the frequency and phase-reference signal, a mechanism for assembling at least a portion of the digital signal into a packet, a mechanism configured to timestamp the packet, and an optical transceiver. The OLT includes a mechanism for receiving the packet, a buffer, a delay mechanism configured to delay reading the received packet from the buffer for a predetermined amount of time, and a DAC for converting the digital signal included in the packet back to RF domain using a clock signal associated with the frequency and phase-reference signal.

Abstract: Systems and methods that provide a one-time programmable (OTP) memory with fault tolerance are provided. In one example, the OTM memory may include a data portion and a multistage programming (MSP) portion. The data of the data portion may be protected by error coding. The MSP portion may include at least one MSP bit and at least one respective redundant MSP bit.

Abstract: Methods and apparatus for dual hash tables are disclosed. An example method includes logically dividing a hash table data structure into a first hash table and a second hash table, where the first hash table and the second hash table are substantially logically equivalent. The example method further includes receiving a key and a corresponding data value, applying a first hash function to the key to produce a first index to a first bucket in the first hash table, and applying a second hash function to the key to produce a second index to a second bucket in the second hash table. In the example method the key and the data value are inserted in one of the first hash table and the second hash table based on the first index and the second index.

Abstract: Transmitting streamed video to at least one wireless terminal by a wireless network having a channel frequency reuse pattern. The wireless network receives a request for the streamed video from the at least one wireless terminal and receives position information from the at least one wireless terminal requesting the streamed video. The wireless network selects a transceiving device to service transmission of the streamed video to the at least one wireless terminal. The transceiving device is allocated a first channel frequency set of the channel frequency reuse pattern. The wireless network or a component thereof selects a channel from a second channel frequency set that is different from the first channel frequency set. The transceiving device then, using a directional antenna, transmits the streamed video to the at least one wireless terminal in a direction based upon the position information using the selected channel.

Abstract: A wireless device for implementing Incremental Redundancy (IR) operations includes an IR memory dedicated to storing data related to the IR operations. The IR memory includes a Type I IR memory adapted to store IR status information of a Radio Link Control (RLC) data block and a Type II IR memory adapted to store the RLC data block.

Abstract: A method for providing a high-speed cell library is provided. The method can include, for example, selecting a set of commonly-occurring logic functions. The method can then include obtaining a netlist of area distributions for each of the set of functions. The netlist can be used to synthesize a set of cell libraries wherein an N-diffusion to P-diffusion area allowance is varied among the set of cell libraries. Thereafter, the method may also include comparing a time delay associated with each of the set of cell libraries with a time delay of a library benchmark delay. Based on the comparing, a delay number may be associated with each of the cell libraries. Finally, the cell libraries may be ranked based on the respective delay numbers associated with each of the cell libraries.

Abstract: A device includes a first integrated circuit, a second integrated circuit and an RF bus controller. Each of the first and second ICs includes a radio frequency (RF) bus transceiver. The RF bus controller is coupled to control intra-device RF communications between the RF bus transceivers of the first and second ICs.

Abstract: A Set Top Box (STB) or client computer includes a communication interface operable to receive digital messages and digital content, memory operable, and processing circuitry coupled to the communication interface and to the memory. The STB is operable to receive a digital message, extract a key portion from the digital message, extract a rights portion from the digital message, determine a code version based upon the rights portion, read a stored code version from the memory, and compare the code version to the stored code version to validate the software instructions. Upon an unfavorable comparison of the code version to the stored code version, initiates an error action that may include sending a message to a service provider device for software instruction reloading, rebooting, and/or disable decryption of the digital content.

Abstract: An integrated circuit (IC) package has a package member having a first surface and a second surface opposite the first surface. A first plurality of contact members is physically and electrically fixed to the second surface. An interposer substrate having a second plurality of contact members on one surface thereof which make physical and electrical contact with respective ones of the first plurality of contact members. The interposer substrate is configured to have at least one circuit member mounted to a second surface thereof opposite the one surface thereof.

Abstract: Methods and systems for hierarchically layered adaptive median motion vector smoothing are disclosed. Aspects of one method may include generating motion vectors (MVs) for video pictures at each level of a hierarchical motion estimation process, where each level may use different resolution video pictures. The MVs may be smooth filtered at each level to reduce or remove spurious MVs. The smooth filtering may comprise scalar median filtering and/or vector median filtering. The smooth filtering may receive as inputs a plurality of MVs, for example, the MV being filtered and eight MVs from the surrounding video blocks. The vector costs of the nine MVs may be compared to a threshold vector cost, and those MVs with costs above the threshold value may be discarded. The threshold value may be dynamically changed based on, for example, content of the video pictures and/or to adjust a window size of the smoothing filter.

Abstract: A method and apparatus that controls the clock of a digital circuit, and therefore power consumption, without substantially comprising performance is provided. The apparatus may include monitoring the utilization of a First in First Out (FIFO) buffer. For example in a systems and methods according to the invention, clock speed may be reduced when the FIFO is relatively empty and increased when the FIFO is relatively full. The clock speed may be controlled by a phase locked loop, a clock divider, a clock masking device or a combination of more than one of these methods. Power reduction may also be obtained by controlling the clocking of different stages of a pipelined device. One or more aspects of the inventions may be implemented in combination with other aspects of the invention to further reduce power use.

Abstract: Wireless devices may utilize a Bluetooth stack to setup a data transmission session with other devices. The data transmission session may include a Bluetooth physical layer or a medium access control/physical layer that permits wireless devices to perform discovery, pairing, and security setup operations. When a radio interface of a wireless device is insufficient to enable performing a required data communication, such as a high data rate communication, a data transmission session may be established with at least one medium access control/physical layer of a plurality of other medium access control/physical layers to accommodate the required data communication.

Abstract: A method for processing signals in a receiver includes receiving a plurality of wireless signals via a plurality of M receive antennas coupled to M corresponding signal amplifiers. The method may also include measuring corresponding signal strengths of M signals generated when each of M phase-shifters is coupled to each of the M receive antennas, while one or more of the M signal amplifiers are disabled. One of the M generated signals may be selected for processing without the use of an antenna switch, where the selecting may be based on the measured signal strength. Each of the plurality of received wireless signals may be amplified prior to the measuring. One or both of an in-phase (I) component and/or a quadrature (Q) component may be generated for each of the M generated signals.

Abstract: A Set Top Box (STB) or client computer includes a communication interface operable to receive digital messages and digital content, memory operable, and processing circuitry coupled to the communication interface and to the memory. The STB is operable to receive a digital message, extract a key portion from the digital message, decrypt the key portion, descramble the digital content using the decrypted key portion, extract a rights portion from the digital message, decrypt the rights portion, determine protected and unprotected digital content based upon the rights portion, write the unprotected digital content to an unprotected portion of the memory, and write the protected digital content to a protected portion of the memory. The decrypted key portion may include a plurality of Program IDs (PIDs) and the decrypted rights portion may include protection data for each PID. A security processor may prevent a central processing unit from accessing the protected portion of the memory.

Abstract: A method of manufacturing an integrated circuit (IC) package is provided. The method includes stacking an interposer substrate and a device structure, the interposer substrate having a first plurality of contact members formed on a first surface of the interposer substrate and the device structure having a second plurality of contact members that are exposed at a surface of the device structure, and laminating the interposer substrate and the device structure such that the first plurality of contact members are physically and electrically coupled to the second plurality of contact members. The interposer substrate is configured such that a circuit member mounted to a second surface of the interposer substrate is electrically coupled to the second plurality of contact members.

Abstract: A global navigation satellite system (GNSS) enabled mobile device comprising a crystal oscillator and an automatic frequency correction (AFC) circuit may be operable to share the crystal oscillator between processing of cellular radio signals and processing of GNSS data messages. The GNSS enabled mobile device may be operable to enforce an AFC correction when the crystal oscillator drifts beyond a specific frequency error. The AFC correction may be allowed during time intervals corresponding to GNSS words at which decoding of these words is not required. The GNSS enabled mobile device may be operable to disable the AFC correction during time intervals associated with decoding of words while the crystal oscillator may drift within the specific frequency error range. After the decoding of one or more of words is completed, the AFC correction may be allowed during the time intervals corresponding to these words.