Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors with shields to increase circuit Q. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.

Abstract: Apparatus and methods for reducing latency in coordinated networks. The apparatus and methods relate to a protocol that may be referred to as the Persistent Reservation Request (“p-RR”), which may be viewed as a type of RR (reservation request). p-RR's may reduce latency, on average, to one MAP cycle or less. A p-RR may be used to facilitate Ethernet audiovisual bridging. Apparatus and methods of the invention may be used in connection with coaxial cable based networks that serve as a backbone for a managed network, which may interface with a package switched network.