Abstract: Efficient synchronization techniques that support multiple reference clocks in an EQAM device. Consider a plurality of different modulators in the EQAM device receiving data from a corresponding plurality of different sources having corresponding different timing references (i.e., different source reference clocks). To accommodate this, the modulators all operate using a common system clock, and each modulator is provided with a phase synchronizer. The phase synchronizer synchronizes the modulated symbol phases to the corresponding reference clock.

Abstract: Methods, apparatuses, and systems are presented for switching between channels of encoded media data involving receiving encoded media data including reference frames and dependent frames for a plurality of channels, wherein each dependent frame refers to at least one reference frame. Frames associated with a first channel from the plurality of channels are decoded to generate a decoded signal for the first channel. While decoding frames associated with the first channel, data corresponding to at least one reference frame associated with a second channel from the plurality of channels are stored. In response to a control signal for switching from the first to the second channel, at least one dependent frame associated with the second channel is decoded by utilizing the stored data corresponding to the at least one reference frame associated with the second channel, to generate a decoded signal for the second channel.

Abstract: An MPEG processor is provided. According to one aspect of the processor, multiple MPEG data streams for corresponding channels are individually stored in an off-chip memory. Corresponding data for a channel is then retrieved from the off-chip memory for processing. The retrieved data is then decoded. The decoded results and associated information are stored on the off-chip memory. Some or all of the associated information that can be used for decoding subsequent data is stored in an on-chip memory. When video images need to be displayed, the corresponding data that is needed for that purpose is then retrieved from the off-chip memory and provided to an analog encoder for encoding in a format that is compatible with an analog display device.

Abstract: A system for high-speed access and recording includes a demodulator, a buffer memory, and a hard disk. During a write cycle, a content stream is stored in buffer memory and thereafter transferred to the demodulator. When the buffer memory reaches its storage capacity, its contents are transferred to the hard disk for storage. During a read cycle, contents from the hard disk are read and then stored in the buffer memory. The hard disk further includes includes a high-speed zone and a random-access zone, which are configured to operate in a high-speed mode, a random-access mode, and a buffer-cleaning mode.

Abstract: A system for providing jitter-free transmissions for demodulated data streams is disclosed. In one embodiment, the system includes a demodulator, a packet processor and a timing generator. The demodulator further includes a timing recovery circuit. Output signals from the timing recovery circuit and demodulated output signals from the demodulator are provided to the timing generator. Using these signals, the timing generator then generates an output timing signal. Demodulated data are provided to the packet processor as input. The demodulated data are then output by the packet processor under the control of the output timing signal from the timing generator.

Abstract: A method and circuitry for implementing digital multi-channel demodulation circuits. More particularly, embodiments of the present invention provide a digital multi-channel demodulator circuit. The demodulator includes a frequency-block down-converter that receives a multi-channel analog RF signal and shifts the multi-channel analog RF signal to a lower frequency band. An ADC receives the multi-channel analog RF signal from the frequency-block down-converter and converts the multi-channel analog RF signal to a multi-channel digital RF signal. A digital channel demultiplexer receives the multi-channel digital RF signal from the ADC and demultiplexes the multi-channel digital RF signal into separate digital RF channels.

Abstract: An improved multi-channel demodulator is provided. The improved demodulator includes an automatic gain control, a data buffer and a demodulation engine. Data from various RF channels are processed by the automatic gain control in order to keep the data at their respective constant levels. Output from the automatic gain control is passed to the data buffer for storage. Corresponding data from a selected channel is then processed by the demodulation engine. The improved demodulator is able to operate in any one of three operating modes, namely, a data processing mode, a channel switching mode and a waiting mode. In the data processing mode, the demodulation engine processes the channel data that is currently loaded into the demodulation engine. In the channel switching mode, the demodulation engine stores the current channel data into the data buffer and retrieves and loads channel data from another channel for processing.

Abstract: The system of a content head end of a distribution system includes a program multiplexer, a multi-channel modulating module, a channel multiplexer, a digital-to-analog converter and a frequency block-up converter, all arranged in a sequential configuration. Packets representing respective content programs are fed to the program multiplexer. The program multiplexer multiplexes the packets into an output queue. Packets from the output queue are then fed to the multi-channel modulating module. The multi-channel modulating module receives the packets and routes them to various modulators representing corresponding RF channels. The various modulators then modulate the respective packets to generate corresponding RF signals. These RF signals are then multiplexed by the channel multiplexer into a multi-channel RF signal. The multi-channel RF signal is then forwarded to the digital-to-analog converter for conversion into an analog, multi-channel RF signal.

Abstract: A system for implementing a base band compression scheme for a nonlinear multiplying up-converter for QPSK and OQPSK includes a bit combining module, a quadrant remap module, a look-up table (LUT) and a zoom adjust module. The bit combining module is configured to generate an address based on a number of symbols received as input data. Using the address provided by the bit combining module, the quadrant remap module remaps symbols from quadrants “2”, “3” and “4” to quadrant “1” and generates signals to look up corresponding output data from the LUT. The zoom adjust module generates a number of solutions corresponding to the input data using the corresponding output data retrieved from the LUT. The zoom adjust module is then used to select the best output from the solutions to provide a smooth output signal that does not have any discontinuities.

Abstract: A system for providing adaptive timing recovery is provided. In an exemplary embodiment, the system includes a fractional resampler, an error function module and a loop filter, arranged collectively to form a timing recovery loop. In an initial mode, the error function module compares the output of the fractional resampler with a reference signal to determine an error, if any. An error signal is generated accordingly based on the error. The error signal is then provided to the loop filter allowing the loop filter to generate a correction signal. The correction signal is provided to the fractional resampler to allow the fractional resampler to generate an output which minimizes the error. When the error function module determines that the error is within an acceptable range, i.e., a timing lock is achieved, the system goes into a steady mode. In the steady mode, the error function module is directed to execute at a slower rate.

Abstract: Error correction coding across multiple channels is provided in multi-channel transmission systems. Specifically, redundancy is provided by selecting a portion of original data from each of a plurality of original channels, performing at least one encoding operation using the portions of original data to produce at least one portion of redundancy data, including the portion of redundancy data in at least one redundancy channel, and transmitting the redundancy channel along with the original channels. Error correction is achieved by receiving at least one redundancy channel and a plurality of original channels, selecting a portion of redundancy data from the redundancy channel, selecting a portion of original data from each of the original channels, and performing at least one decoding operation using the portion of redundancy data and the portions of original data to correct at least one error in the portions of original data.

Abstract: A method and system are provided for synchronizing a digital video system that includes a transmitter, a receiver, and a decoder. A transport packet is received from the transmitter. At the start of receiving the transport packet, a system time clock timestamp is captured. A program clock reference timestamp is also obtained from the transport packet and is compared with the system time clock timestamp.

Abstract: A deinterleaver for performing high-speed multi-channel forward error correction using external SDRAM is provided. According to one exemplary aspect, the deinterleaver performs both read and write accesses to the SDRAM that are burst-oriented by hiding active and precharge cycles in order to achieve high data rate operations. The data bus length of the SDRAM is designed to be twice the deinterleaving symbol size thereby allowing bandwidth to be increased. The deinterleaver accesses data in the SDRAM as read blocks and write blocks. Each block includes a predetermined number of data words to be interleaved/deinterleaved. The ACTIVE command for one block is issued when a preceding block is being processed. Data in one read/write block has the same row address within the same bank of the SDRAM.

Abstract: Error correction coding across multiple channels is provided in multi-channel transmission systems. Specifically, redundancy is provided by selecting a portion of original data from each of a plurality of original channels, performing at least one encoding operation using the portions of original data to produce at least one portion of redundancy data, including the portion of redundancy data in at least one redundancy channel, and transmitting the redundancy channel along with the original channels. Error correction is achieved by receiving at least one redundancy channel and a plurality of original channels, selecting a portion of redundancy data from the redundancy channel, selecting a portion of original data from each of the original channels, and performing at least one decoding operation using the portion of redundancy data and the portions of original data to correct at least one error in the portions of original data.

Abstract: A method and system for transferring a transport stream, such as from a satellite receiver to a networked computer system, are provided. The transport stream is parsed to derive multiple elementary streams including associated program identifiers, which are used to determine corresponding transfer locations in a host memory. Direct memory access transfers of the multiple elementary streams are then performed to the corresponding transfer locations in the host memory.

Abstract: Methods, apparatuses, and systems are presented for switching between channels of encoded media data involving receiving encoded media data including reference frames and dependent frames for a plurality of channels, wherein each dependent frame refers to at least one reference frame. Frames associated with a first channel from the plurality of channels are decoded to generate a decoded signal for the first channel. While decoding frames associated with the first channel, data corresponding to at least one reference frame associated with a second channel from the plurality of channels are stored. In response to a control signal for switching from the first to the second channel, at least one dependent frame associated with the second channel is decoded by utilizing the stored data corresponding to the at least one reference frame associated with the second channel, to generate a decoded signal for the second channel.

Abstract: A method and system are provided for processing a data transport stream. The transport stream is parsed to derive multiple elementary substreams, each of which includes a received media access control address. The received media access control address is then compared in hardware against several stored media access control addresses.

Abstract: A method and circuitry for implementing digital multi-channel demodulation circuits. More particularly, embodiments of the present invention provide a digital multi-channel demodulator circuit. The demodulator includes a frequency-block down-converter that receives a multi-channel analog RF signal and shifts the multi-channel analog RF signal to a lower frequency band. An ADC receives the multi-channel analog RF signal from the frequency-block down-converter and converts the multi-channel analog RF signal to a multi-channel digital RF signal. A digital channel demultiplexer receives the multi-channel digital RF signal from the ADC and demultiplexes the multi-channel digital RF signal into separate digital RF channels.

Abstract: Method and apparatus for generating sinusoidal signals in quadrature. A numerically controlled oscillator includes a phase accumulator configured to generate a periodic multi-bit signal at a given frequency; a first memory configured to store an octant of a sinusoidal waveform; a second memory configured to store a complementary octant of the sinusoidal waveform; and a control circuit, responsive to at least a portion of the phase accumulator signal and coupled to the first and second memories, the control circuit configured to access the first and second memories in parallel and construct respective sine and cosine waves at the given frequency.

Abstract: Error correction coding across multiple channels is provided in multi-channel transmission systems. Specifically, redundancy is provided by selecting a portion of original data from each of a plurality of original channels, performing at least one encoding operation using the portions of original data to produce at least one portion of redundancy data, including the portion of redundancy data in at least one redundancy channel, and transmitting the redundancy channel along with the original channels. Error correction is achieved by receiving at least one redundancy channel and a plurality of original channels, selecting a portion of redundancy data from the redundancy channel, selecting a portion of original data from each of the original channels, and performing at least one decoding operation using the portion of redundancy data and the portions of original data to correct at least one error in the portions of original data.