Patents Assigned to Brocade Communications Systems
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Publication number: 20130161277Abstract: A plenum assembly for a shallow chassis in a rack-mount system. The rack mount system includes a first set of posts at a first end of the rack, a second set of posts at a second end of the rack, and guide rails that extend between the first and second sets of posts. A shallow chassis mounted on the guide rails extends from the first end of the rack to an intermediate location, between the first and second ends of the rack. The plenum assembly is also mounted on the guide rails, and extends from the second end of the rack to the intermediate location, providing an airway from the second end of the rack to the shallow chassis. The plenum assembly can include telescoping sections to extend various lengths. Alternately, the plenum assembly can have a two piece construction, which is assembled after routing cables to the shallow chassis.Type: ApplicationFiled: July 25, 2012Publication date: June 27, 2013Applicant: Brocade Communications Systems, Inc.Inventors: Scott W. Augsburger, Daniel K. Kilkenny, David A. Skirmont
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Patent number: 8446914Abstract: One embodiment of the present invention provides a switch. The switch includes a forwarding mechanism and a control mechanism. During operation, the forwarding mechanism forwards frames based on their Ethernet headers. The control mechanism operates the switch in conjunction with a separate physical switch as a single logical switch and assigns a virtual switch identifier to the logical switch, wherein the virtual switch identifier is associated with a link aggregation group.Type: GrantFiled: April 22, 2011Date of Patent: May 21, 2013Assignee: Brocade Communications Systems, Inc.Inventors: Joseph Juh-En Cheng, Wing Cheung, John Michael Terry, Suresh Vobbilisetty, Surya P. Varanasi, Parviz Ghalambor
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Patent number: 8446913Abstract: A Fibre Channel router used to join fabrics. EX_ports are used to connect to the fabrics. The EX_port joins the fabric but the router will not merge into the fabric. Ports in the Fibre Channel router can be in a fabric, but other ports can be connected to other fabrics. Fibre Channel routers can be interconnected using a backbone fabric. Global, interfabric and encapsulation headers are developed to allow routing by conventional Fibre Channel switch devices in the backbone fabric and simplify Fibre Channel router routing. Phantom domains and devices must be developed for each of the fabrics being interconnected. Front phantom domains are present at each port directly connected to a fabric. Each of these is then connected to at least one translate phantom domain. Zoning is accomplished by use of a special LSAN zoning naming convention. This allows each administrator to independently define devices are accessible.Type: GrantFiled: March 10, 2011Date of Patent: May 21, 2013Assignee: Brocade Communications Systems, Inc.Inventors: Daniel Ji Yong Park Chung, Dennis Hideo Makishima
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Publication number: 20130103881Abstract: A multi-processor architecture for a network device that includes a plurality of barrel cards, each including: a plurality of processors, a PCIe switch coupled to each of the plurality of processors, and packet processing logic coupled to the PCIe switch. The PCIe switch on each barrel card provides high speed flexible data paths for the transmission of incoming/outgoing packets to/from the processors on the barrel card. An external PCIe switch is commonly coupled to the PCIe switches on the barrel cards, as well as to a management processor, thereby providing high speed connections between processors on separate barrel cards, and between the management processor and the processors on the barrel cards.Type: ApplicationFiled: December 14, 2012Publication date: April 25, 2013Applicant: Brocade Communications Systems, Inc.Inventor: Brocade Communications Systems, Inc.
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Patent number: 8427958Abstract: A switch creates and dynamically updates a latency map of a network to adjust routing of flows. Further, the network is monitored to detect latency issues and trigger a dynamic adjustment of routing based on the latency map. In this manner, a flow can be routed along a route (i.e., a faster route) that provides less latency than other available routes. The latency map can be generated based on latency probe packets that are issued from and returned to the source switch. By evaluating many such latent probe packets that have traveled along many available routes (e.g., corresponding to various ports of the switch), the switch or associated administrative logic can dynamically adjust the latency map to updated latency information of available routes. Therefore, responsive to a trigger, the source switch can dynamically adjust the routing of a flow based on latency issues discerned from the network.Type: GrantFiled: April 30, 2010Date of Patent: April 23, 2013Assignee: Brocade Communications Systems, Inc.Inventors: Kung-Ling Ko, Surya Prakash Varanasi, Satsheel B. Altekar, John Michael Terry, Venkata Pramod Balakavi
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Patent number: 8412831Abstract: An IP gateway device establishes distinct TCP sessions within a single FCIP tunnel, each TCP session being designated for a different priority of service (e.g., high, medium, low), plus a control stream. Each TCP session has its own TCP stack and its own settings for VLAN Tagging (IEEE 802.1Q), quality of service (IEEE 802.1P) and Differentiated Services Code Point (DSCP). By distributing data streams assigned to different priorities of service into different TCP sessions within the FCIP tunnel, an IP gateway device can preserve the distinctions between the data stream priorities while the data traffic is within the IP network.Type: GrantFiled: August 3, 2009Date of Patent: April 2, 2013Assignee: Brocade Communications Systems, Inc.Inventors: Mark S. Detrick, Robert Grant Engebretson, Senthilkumar Narayanasamy, Benjamin Patrick Hart
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Patent number: 8413018Abstract: A programmable device employs an address and data corruption logic for data written to a first memory. A first signature is computed from the data stored in the first memory and stored in a second memory. When data is read from the first memory, the first signature stored in the second memory is read and compared with a second signature computed from the data read from the first memory. If the first and second signatures do not match, an error condition is indicated.Type: GrantFiled: August 17, 2009Date of Patent: April 2, 2013Assignee: Brocade Communications Systems, Inc.Inventors: Kung-Ling Ko, Surya Prakash Varanasi, Subbarao Palacharla
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Patent number: 8406125Abstract: Techniques that enable a network device such as a router to provide multicast routing services without interruption, even in the event of a switchover. An incremental updates technique is used to synchronize multicast information maintained by a first processor and multicast information maintained by a second processor. The first processor may be a management processor operating in active mode in a network device and the second processor may be a management processor operating in standby mode in the network device. The second processor may also be a processor on a linecard of the network device.Type: GrantFiled: October 27, 2010Date of Patent: March 26, 2013Assignee: Brocade Communications Systems, Inc.Inventors: Mehul Dholakia, Wing-Keung Adam Yeung, Ajeer S. Pudiyapura
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Publication number: 20130070766Abstract: Techniques for organizing and grouping memory contents related to multicast routing so as to enable more efficient multicast operations. For PIM multicast routing, techniques are provided for organizing and grouping multicast routing information into data structures according to a plurality of dimensions such that multicast routing cache entries are accessible when performing a multicast routing operation by traversing the one or more data structures according to at least two of the dimensions.Type: ApplicationFiled: September 15, 2012Publication date: March 21, 2013Applicant: Brocade Communications Systems, Inc.Inventor: Ajeer Salil Pudiyapura
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Patent number: 8397007Abstract: A technique for interrupt moderation allows coalescing interrupts from a device into groups to be processed as a batch by a host processor. Receive and send completions may be processed differently. When the host is interrupted for receive completions, it may check for send completions, reducing the need for interrupts related to send completions. Timers and a counter allow coalescing interrupts into a single interrupt that can be used to signal the host to process multiple completions. The technique is suitable for both dedicated interrupt line and message-signaled interrupts.Type: GrantFiled: July 16, 2012Date of Patent: March 12, 2013Assignee: Brocade Communications Systems, Inc.Inventors: Somesh Gupta, Venkatesh Nagapudi
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Publication number: 20130044586Abstract: Techniques for reducing the latency in performing a failover from a protected connection to its backup connection when a network event is detected affecting the protected connection. In an MPLS network, techniques are provided for failing a protected LSP to a backup LSP in a fast and efficient manner. In one embodiment, the faster failover is facilitated by storing protected LSPs and their backup LSPs information in the data plane, such as locally on a linecard.Type: ApplicationFiled: August 14, 2012Publication date: February 21, 2013Applicant: Brocade Communications Systems, Inc.Inventors: Mohammad Hanif, Dilip Kumar, Minjie Dai, Lisa Hong Nguyen, Sundeep Kumar Singh
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Patent number: 8379658Abstract: A method and apparatus is disclosed for temporarily deferring transmission of frames to a destination in a data switch. When a request for transmission of a frame to the destination port is received, the congestion status of that destination is determined. If the destination is congested, the frame is stored in a deferred queue. When the status of a destination changes from congested to non-congested, the deferred queue is examined to see if any deferred frames can now be forwarded to their destination. While examining the deferred queue, incoming frames are placed on a backup queue. When the deferred queue is fully analyzed, the backup queue is emptied by either sending those frames to their destination or storing the frames in the deferred queue. While examining the deferred queue, the congested states of the destinations are not allowed to change from congested to non-congested.Type: GrantFiled: June 30, 2010Date of Patent: February 19, 2013Assignee: Brocade Communications Systems, Inc.Inventors: Steven G. Schmidt, Anthony G. Tornetta, Harry V. Paul, Henry J. Gonzalez
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Patent number: 8375363Abstract: A “high availability” system comprises multiple switches under the control of a control processor (“CP”). The firmware executing on the processor can be changed when desired. Consistent with the high availability nature of the system (i.e., minimal down time), a single CP system implements a firmware change by loading new firmware onto the system, saving state information pertaining to the old firmware, preventing the old firmware from communicating with the switches, bringing the new firmware to an active state and applying the saved state information to the new firmware.Type: GrantFiled: June 28, 2007Date of Patent: February 12, 2013Assignee: Brocade Communications Systems, Inc.Inventors: Bill J. Zhou, Richard L. Hammons
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Patent number: 8369335Abstract: A system is provided for facilitating assignment of a virtual routing node identifier to a non-routing node. During operation, the system assigns to a non-routing node coupled to a switch a virtual routing node identifier unique to the non-routing node. In addition, the system communicates reachability information corresponding to the virtual routing node identifier to other switches in the network.Type: GrantFiled: March 24, 2010Date of Patent: February 5, 2013Assignee: Brocade Communications Systems, Inc.Inventors: Pankaj K. Jha, Mitri Halabi
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Publication number: 20130031077Abstract: A LPM search engine includes a plurality of exact match (EXM) engines and a moderately sized TCAM. Each EXM engine uses a prefix bitmap scheme that allows the EXM engine to cover multiple consecutive prefix lengths. Thus, instead of covering one prefix length L per EXM engine, the prefix bitmap scheme enables each EXM engine to cover entries having prefix lengths of L, L+1, L+2 and L+3, for example. As a result, fewer EXM engines are potentially underutilized, which effectively reduces quantization loss. Each EXM engine provides a search result with a determined fixed latency when using the prefix bitmap scheme. The results of multiple EXM engines and the moderately sized TCAM are combined to provide a single search result, representative of the longest prefix match. In one embodiment, the LPM search engine supports 32-bit IPv4 (or 128-bit IPv6) search keys, each having associated 15-bit level 3 VPN identification values.Type: ApplicationFiled: October 28, 2011Publication date: January 31, 2013Applicant: Brocade Communications Systems, Inc.Inventors: Jian Liu, Philip Lynn Leichty, How Tung Lim, John Michael Terry, Mahesh Srinivasa Maddury, Wing Cheung, Kung Ling Ko
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Patent number: 8339994Abstract: A Layer 2 network switch fabric is partitionable into a plurality of virtual fabrics. A network switch chassis is partitionable into a plurality of logical switches, each of which may be associated with one of the virtual fabrics, including a base switch. Logical switches in multiple network switch chassis are connected by logical connections, such as logical inter-switch links that use physical connections, such as extended inter-switch links between base switches, for data transport. A topology of logical connections is established that balances competing metrics, such as robustness and scalability, while maintaining alignment with the topology of the physical connections. A topology factor allows establishing different topologies with different balances between the competing metrics.Type: GrantFiled: August 27, 2009Date of Patent: December 25, 2012Assignee: Brocade Communications Systems, Inc.Inventors: Sathish Kumar Gnanasekaran, Shashank R. Tadisina, Subramanian Lakshmanan
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Patent number: 8340120Abstract: An Ethernet/Fiber Channel network interface device which can be configured by a user to operate on an FC SAN, a CEE network or both. In one embodiment the configuration can be done using jumpers or connections to the pins of a chip, thus allowing a manufacturer to only inventory one device for use with either or both networks. In a second embodiment the configuration can be done in software by setting registers and memory values on the device. This embodiment allows the device to be changed between configurations without removing it from the server or blade. The devices according to the preferred embodiments further reduce power consumption by shutting down portions of the chip not needed based on the configuration of the device.Type: GrantFiled: September 30, 2009Date of Patent: December 25, 2012Assignee: Brocade Communications Systems, Inc.Inventors: Venkata Pramod Balakavi, Venky Nagapudi, Sathseel Altekar, Surya Prakash Varanasi, Li Zhao, Yash V. Bansal
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Patent number: 8341459Abstract: A system includes a source storage device, a target storage device, a host coupled to the source storage device and the target storage device, and a first migration device coupled to the source storage device and the target storage device. The first migration device includes a first virtual storage device. The first migration device is configured to migrate data from the source storage device to the target storage device, and the first virtual storage device is configured to receive write access requests for the data from the host during the data migration and send the access request to the source storage device and target storage device.Type: GrantFiled: July 31, 2008Date of Patent: December 25, 2012Assignee: Brocade Communications Systems, Inc.Inventors: Balakumar Kaushik, Deepak Hegde, Anil Kumar, Narasimha Murthy
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Patent number: 8335884Abstract: A multi-processor architecture for a network device that includes a plurality of barrel cards, each including: a plurality of processors, a PCIe switch coupled to each of the plurality of processors, and packet processing logic coupled to the PCIe switch. The PCIe switch on each barrel card provides high speed flexible data paths for the transmission of incoming/outgoing packets to/from the processors on the barrel card. An external PCIe switch is commonly coupled to the PCIe switches on the barrel cards, as well as to a management processor, thereby providing high speed connections between processors on separate barrel cards, and between the management processor and the processors on the barrel cards.Type: GrantFiled: July 10, 2009Date of Patent: December 18, 2012Assignee: Brocade Communications Systems, Inc.Inventors: Mehrdad Hamadani, Deepak Bansal, Sam Htin Moy, Sreenivasulu Malli, David Cheung, Mani Kancherla, Sridhar Devarapalli
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Patent number: 8327000Abstract: A switch may be used to force the expiration of a cookie on a user's system by inserting an expiration field into the cookie contained in a network response packet. Additionally, a mechanism is provided to delete or damage a cookie contained in a network request packet, so that server software is not disrupted by the receipt of a cookie. Deleting a cookie results in a cleaner request, but damaging a cookie may be more efficient in certain circumstances. By providing these features, an efficient cookie switching design is provided.Type: GrantFiled: December 6, 2010Date of Patent: December 4, 2012Assignee: Brocade Communications Systems, Inc.Inventor: Rui Li