Abstract: An approach for simulating hot carrier effects in an integrated circuit (IC) at the circuit level includes generating a hot carrier library of delay data for each cell in the IC, using the hot carrier library data to generate a set of scaled timing data for the IC and using the scaled timing data with a IC performance simulator to simulate the IC operation. The scaled timing data is based upon the cell delay data and time-based switching activity of each cell in the IC.
Type:
Grant
Filed:
May 29, 1998
Date of Patent:
August 21, 2001
Assignees:
Matsushita Electric Industrial Co., Ltd., BTA Technology Inc.