Abstract: An industrial I/O controller is implemented on a processor board and includes two I/O daughter boards which are mounted on and parallel to the processor board by means of connectors such that the entire system occupies only a single slot space of a VMEbus back plane. The processor board includes a VMEbus connector attached to its upper right-hand edge. First buffer circuitry, a static RAM, second buffer circuitry and an EPROM are located from right to left along the upper edge of the processor board. Two connectors for attachment of two I/O daughter boards are located in the lower part of the processor board.

Abstract: In a system based upon a microprocessor, the instruction set of which includes only one trap instruction, a software monitor is provided in which the user can define and monitor software break points without using trap instructions, thereby leaving the entire instruction set available to a user to execute, develop, or debug software containing trap instructions. To accomplish this result, software break points are defined at desired addresses by replacing user instructions at such addresses with call instructions that call a monitor routine which handles software break points. The argument of the call instruction is made equal to its op code. The portion of the monitor that handles software break points is entered at an address equal to the op code of the call instruction inserted at the break point address. This procedure avoids overwriting errors that otherwise would occur when software break points are defined at consecutive locations of the user program.