Patents Assigned to Business Machines Corporation
-
Patent number: 9929266Abstract: A semiconductor structure includes a plurality of stacked and suspended semiconductor nanosheets located above a semiconductor substrate. Each semiconductor nanosheet has a pair of end sidewalls that have a V-shaped undercut surface. A functional gate structure is located around the plurality of stacked and suspended semiconductor nanosheets, and a source/drain (S/D) semiconductor material structure is located on each side of the functional gate structure. In accordance with the present application, sidewall portions of each S/D semiconductor material structure are in direct contact with the V-shaped undercut surface of the end sidewalls of each of the semiconductor nanosheets.Type: GrantFiled: January 25, 2016Date of Patent: March 27, 2018Assignee: International Business Machines CorporationInventors: Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi, Alexander Reznicek
-
Patent number: 9928038Abstract: During a first execution of software, historical data is logged that indicates which locale objects were used. During a second execution of the software, the historical data is read, and locale objects or subsections of locale objects are dynamically built from locale source files based on the historical data in the log that indicates which locale objects were used during the first execution. Any other locale objects or subsections that are needed that are not built initially during the second execution are dynamically built from locale source files when requested at run-time. Dynamically building locale objects or subsections based on which locale objects were used in one or more previous executions saves time that would otherwise be required to build the locale objects when they are needed at run-time. The result is significant savings in system-wide resources while still allowing for access to a large number of possible locales.Type: GrantFiled: July 22, 2015Date of Patent: March 27, 2018Assignee: International Business Machines CorporationInventors: Leander Bromley, Jr., Christopher J. Brown, Thuy Phuong Christenson, Patrick L. Glenski, Kershaw S. Mehta
-
Patent number: 9927411Abstract: A structure is provided. The structure may include an environmental test chamber including a sample chamber, a first air path beginning in the sample chamber and extending through a humidity control chamber, the first air path circulates air between the test chamber and the humidity control chamber, and a second air path beginning in the sample chamber and extending through a pollutant control chamber, the second air path circulates air between the test chamber and the pollutant control chamber.Type: GrantFiled: September 8, 2015Date of Patent: March 27, 2018Assignee: International Business Machines CorporationInventor: Prabjit Singh
-
Patent number: 9928008Abstract: Supporting of both reading and writing data to a storage media is provided. A data request is received and a storage medium to support the data request is identified. A parameter related to the data request is retrieved and pre-loaded to an associated media accessor prior to loading the storage media. The parameter includes a setting adjustment of the media accessor in support of the data request. The media accessor performs the data request in compliance with the setting adjustment.Type: GrantFiled: March 6, 2017Date of Patent: March 27, 2018Assignee: International Business Machines CorporationInventor: Daniel F. Smith
-
Patent number: 9925916Abstract: Embodiments of the present invention provide methods, systems, and computer program products for generating a linear projection of a route. In one embodiment, route information is received and parsed. Supplementary route data is received. A linear route is generated and provided to a user, the linear route comprising a straight line and one or more segments extending form the straight line, where ends of the straight line represent a starting point and destination of the linear route, and the one or more segments represent turns.Type: GrantFiled: January 16, 2017Date of Patent: March 27, 2018Assignee: International Business Machines CorporationInventors: Rajesh Kalyanaraman, Senthil K. Venkatesan
-
Patent number: 9928060Abstract: The method includes adjusting, by one or more computer processors, a Javascript object notation structure to comprise a tag on at least one object and a tag on at least one array. The method further includes receiving, by one or more computer processors, data indicating a first set of at least one change to the Javascript object notation structure. The method further includes adjusting, by one or more computer processors, the tags in the Javascript object notation structure to include the first set of the at least one change in the Javascript object notation structure. The method further includes receiving, by one or more computer processor, data indicating the first set of the at least one change to the Javascript object notation structure is complete. The method further includes displaying the first set of the at least one change to the Javascript object notation structure based upon the adjusted tags.Type: GrantFiled: November 30, 2015Date of Patent: March 27, 2018Assignee: International Business Machines CorporationInventor: Amit P. Joglekar
-
Patent number: 9927982Abstract: A computer program product includes a computer readable storage medium having program instructions executable by a tape drive to cause the tape drive to perform a method comprising: receiving, at the tape drive, a request for a write operation to be performed in the tape drive; determining, by the tape drive, an expected transaction size of a next write operation; comparing, by the tape drive, the expected transaction size of the next write operation to each of a first transaction size threshold and a second transaction size threshold in response to receiving the request; determining, by the tape drive, an optimum a write procedure based at least in part on the comparison; and invoking, by the tape drive, the optimum write procedure in response to determining the optimum write procedure.Type: GrantFiled: August 18, 2017Date of Patent: March 27, 2018Assignee: International Business Machines CorporationInventors: James M. Karp, Takashi Katagiri, Yuhko Mori, Yutaka Oishi
-
Patent number: 9928162Abstract: The method includes identifying a test report log for a regression test. The method further includes identifying one or more errors in the identified test report log. The method further includes determining a severity category for the one or more identified errors in the identified test report log. The method further includes determining a severity category for the identified test report log based on the determined severity category for the one or more identified errors in the identified test report log.Type: GrantFiled: March 27, 2015Date of Patent: March 27, 2018Assignee: International Business Machines CorporationInventors: Christopher L. Brealey, Shinoj Zacharias
-
Patent number: 9925544Abstract: An airborne particle collection system includes an airflow directing unit, register units, a fan unit, and a control system. The airflow directing unit includes a plurality of separately controlled air distribution segments. Each register unit includes a motorized damper and filter. The fan unit is connected to the airflow directing unit and to the register units through piping. The fan unit injects air into the airflow directing unit, and generates a vacuum force that causes exhaust air with airborne particles to be pulled into the register units and filtered by the filters within the register units. The control system selectively controls the air distribution segments of the airflow directing unit and the motorized dampers of the register units to generate alterable airflow patterns between the airflow directing unit and the register units in different zones within a room in which the airflow directing unit and the register units are disposed.Type: GrantFiled: August 5, 2015Date of Patent: March 27, 2018Assignee: International Business Machines CorporationInventors: Eric J. Barkie, Benjamin L. Fletcher, Andrew P. Wyskida
-
Patent number: 9927574Abstract: An optical component includes a component body, and at least one angled-facet waveguide formed in the component body, wherein the angled-facet waveguide is substantially mirror-symmetrical in shape relative to a line at or near the center of the angled-facet waveguide.Type: GrantFiled: January 31, 2017Date of Patent: March 27, 2018Assignee: International Business Machines CorporationInventors: Russell A. Budd, Daniel M. Kuchta, Benjamin Giles Lee, Laurent Schares, Clint Lee Schow
-
Patent number: 9928081Abstract: A method and system are provided for generating customized program logic operable to control hardware devices of a target system and to boot said target system. The system is connected to one or more target systems via a network, the server system being adapted for: receiving a first list of device identifiers from one of the target systems; automatically selecting, for each of the device identifiers in the received first list, at least one driver operable to control the identified device from a set of drivers, thereby generating a sub-set of said set of drivers; providing a core program logic to the target system; and providing the sub-set of drivers to the target system, wherein a combination of the sub-set of drivers and the core program logic constitutes a customized program logic operable to control the devices of said target system.Type: GrantFiled: September 6, 2013Date of Patent: March 27, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Fabio Cerri, Gianluca Mariani, Claudio Marinelli, Bernardo Pastorelli, Antonio Secomandi
-
Patent number: 9930024Abstract: Techniques for detecting security flaws are described herein. An example system includes a processor to perform a login attempt into a website to be tested using a first social login account and a first verification to determine whether the first social login account is logged in. The processor can monitor a database associated with the website for queries. The processor can perform a second login attempt into the website using a second social login account and a second verification to determine whether the second social login account is logged in. The processor can perform a third login attempt using a third social login account. The processor can detect a second set of features based on the queries during the third login attempt. The processor can detect a social login security flaw based on the first and second verification, and the first and second set of detected features.Type: GrantFiled: November 2, 2015Date of Patent: March 27, 2018Assignee: International Business Machines CorporationInventors: Roee Hay, Or Peles
-
Patent number: 9928329Abstract: Generating a layout of an integrated circuit chip area from a description of an integrated circuit (IC). The description includes a register-transfer-level (RTL) design. The RTL design is partitioned in large blocks for synthesis of large block synthesis (LBS) blocks. The description of the IC further includes a floorplan for the IC, wherein each LBS block to be synthesized is assigned to a respective rectilinear shape in the floorplan and the rectilinear shapes do not overlap each other.Type: GrantFiled: January 27, 2016Date of Patent: March 27, 2018Assignee: International Business Machines CorporationInventors: Harry Barowski, Harald D. Folberth, Joachim Keinert, Sourav Saha
-
Patent number: 9929270Abstract: A method for manufacturing a fin field-effect transistor (FinFET) device, comprises patterning a first layer on a substrate to form at least one fin, patterning a second layer under the first layer to remove a portion of the second layer on sides of the at least one fin, forming a sacrificial gate electrode on the at least one fin, and a spacer on the sacrificial gate electrode, selectively removing the sacrificial gate electrode, depositing an oxide layer on top and side portions of the at least one fin corresponding to a channel region of the at least one fin, performing thermal oxidation to condense the at least one fin in the channel region until a bottom portion of the at least one fin is undercut, and stripping a resultant oxide layer from the thermal oxidation, leaving a gap in the channel region between a bottom portion of the at least one fin and the second layer.Type: GrantFiled: May 1, 2017Date of Patent: March 27, 2018Assignee: International Business Machines CorporationInventors: Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi, Alexander Reznicek
-
Patent number: 9929057Abstract: A method for filling gaps between structures includes forming a plurality of high aspect ratio structures adjacent to one another with gaps, forming a first dielectric layer on tops of the structures and conformally depositing a spacer dielectric layer over the structures. The spacer dielectric layer is removed from horizontal surfaces and a protection layer is conformally deposited over the structures. The gaps are filled with a flowable dielectric, which is recessed to a height along sidewalls of the structures by a selective etch process such that the protection layer protects the spacer dielectric layer on sidewalls of the structures. The first dielectric layer and the spacer dielectric layer are exposed above the height using a higher etch resistance than the protection layer to maintain dimensions of the spacer layer dielectric through the etching processes. The gaps are filled by a high density plasma fill.Type: GrantFiled: November 3, 2016Date of Patent: March 27, 2018Assignees: International Business Machines Corporation, GlobalFoundries, Inc.Inventors: Huiming Bu, Andrew M. Greene, Balasubramanian Pranatharthiharan, Ruilong Xie
-
Patent number: 9928064Abstract: Execution of a set of instructions within a transaction is prevented. A processor identifies a first set of instructions in an instruction stream of a transaction. The first set of instructions incurs a first memory access that is not visible to the transaction and will cause the transaction to abort. The processor generates a second set of instructions that incurs a second memory access that is visible to the transaction. The second set of instructions is generated based on the first memory access and first set of instructions. The processor executes, within the transaction, the second set of instructions instead of the first set of instructions.Type: GrantFiled: November 10, 2015Date of Patent: March 27, 2018Assignee: International Business Machines CorporationInventors: Fadi Y. Busaba, Michael Karl Gschwind, Maged M. Michael, Chung-Lung K. Shum, Valentina Salapura, Timothy J. Slegel
-
Patent number: 9928128Abstract: A supervisory hardware device in a processor core detects a flush instruction that, when executed, flushes content of one or more general purpose registers (GPRs) within the processor core. The content of the one or more GPRs is moved to a history buffer (HB) and an instruction sequencing queue (ISQ) within the processor core, where the content includes data, an instruction tag (iTag) that identifies an instruction that generated the data, and error correction code (ECC) bits for the data. In response to receiving a restore instruction, the supervisory hardware device error checks the data in the ISQ using the ECC bits stored in the ISQ. In response to detecting an error in the data in the ISQ, the supervisory hardware device sends the data and the ECC bits from the ISQ to an ECC scrubber to generate corrected data, which is restored into the one or more GPRs.Type: GrantFiled: April 1, 2016Date of Patent: March 27, 2018Assignee: International Business Machines CorporationInventors: Brian D. Barrick, James W. Bishop, Marcy E. Byers, Sundeep Chadha, Niels Fricke, Dung Q. Nguyen, David R. Terry
-
Patent number: 9929209Abstract: A mechanism is provided for an integrated laminated magnetic device. A substrate and a multilayer stack structure form the device. The multilayer stack structure includes alternating magnetic layers and diode structures formed on the substrate. Each magnetic layer in the multilayer stack structure is separated from another magnetic layer in the multilayer stack structure by a diode structure.Type: GrantFiled: January 25, 2017Date of Patent: March 27, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Philipp Herget, Eugene J. O'Sullivan, Lubomyr T. Romankiw, Naigang Wang, Bucknell C. Webb
-
Patent number: 9928312Abstract: A first stream operator can receive a first tuple including a first set of attributes to be stored in a first window and a second tuple including a second set of attributes to be stored in a second window. The first window and the second window can each have an eviction policy. In response to triggering the eviction policy for the first window and the second window, the first tuple stored in the first window can be compared with the second tuple stored in the second window. Based upon the comparing, it can be determined that the first tuple and the second tuple go outside of a join threshold. In response to determining that the first tuple and the second tuple go outside of a join threshold, the eviction policy of the first window can be altered.Type: GrantFiled: August 21, 2017Date of Patent: March 27, 2018Assignee: International Business Machines CorporationInventors: Eric L. Barsness, Michael J. Branson, John M. Santosuosso
-
Patent number: 9927976Abstract: A method begins by a dispersed storage (DS) processing module of a dispersed storage network (DSN) sending a plurality of sets of encoded data slices to DSN memory for storage in accordance with a plurality of sets of DSN data addresses. The method continues with the DS processing module generating retrieval data that is based on a data object number and data storage information. The method continues with the DS processing module dispersed storage error encoding the retrieval data to produce a set of encoded retrieval data slices and generating a set of DSN retrieval data addresses based on the data name and on retrieval data storage information. The method continues with the DS processing module sending the set of encoded retrieval data slices to the DSN memory for storage in accordance with the set of DSN retrieval data addresses.Type: GrantFiled: November 7, 2016Date of Patent: March 27, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Manish Motwani, Michael Colin Storm, Ilya Volvovski, Greg Dhuse, Andrew Baptist, Wesley Leggette