Abstract: Compressed video transcoding apparatus and methods are disclosed. One embodiment eliminates the need for reorder buffers by utilizing an encode order video decoder which decodes a first compressed video bit stream to provide a sequence of frames in an encode order suitable for direct encoding without further reordering. An encode order video encoder receives the sequence of frames in encode order and directly encodes the frames without further reordering to provide a second compressed video bit stream. Another embodiment utilizes a frame reorder device to reorder compressed frames of a first compressed video bit stream into an encode order such that a subsequent encoding operation after decoding the first compressed video bit stream can be performed without further reordering of the frames. The reordered compressed frames are decoded and applied in the encode order to an encoder which encodes the frames to provide a second compressed video bit stream.

Abstract: A structure and a format for providing a video signal encoder under the MPEG standard are provided. In one embodiment, the video signal interface is provided with a decimator for providing input filtering for the incoming signals. In one embodiment, the central processing unit (CPU) and multiple coprocessors implements DCT and IDCT and other signal processing functions, generating variable length codes, and provides motion estimation and memory management. The instruction set of the central processing unit provides numerous features in support for such features as alpha filtering, eliminating redundancies in video signals derived from motion pictures and scene analysis. In one embodiment, a matcher evaluates 16 absolute differences to evaluate a "patch" of eight motion vectors at a time.

Abstract: A reference picture is processed to generate, first, second and third pictures. The first picture has a lower resolution than the second picture and the second picture has a lower resolution than the third picture. Using independent starting positions, first and second stage field motion estimation (motion vector) searches are preformed using the first and second pictures, respectively. By performing the first stage field motion estimation search, a first field motion vector candidate is obtained. By performing the second stage field motion estimation search, a second field motion vector candidate is obtained. Using at least one of the first and second field motion vector candidates as a starting position and the third picture, a third stage field motion estimation search is performed. Alternatively, a first stage field motion estimation search is performed using the first picture to obtain a first motion vector from a top reference field and a second motion vector from a bottom reference field.

Abstract: A method is provided for parsing closed captioning data (or other types of like embedded data, such as extended service data) encoded according to one of at least three syntaxes. An encoded video signal is received which is hierarchically organized into picture sections of a picture layer. Each picture section contains an encoded picture and at least one corresponding user data section. A beginning of a sequence of bits of the user data section is identified within one of the picture sections. If the identified sequence of bits contains either undefined data or closed captioning data encoded according to either a specific first syntax or closed captioning data encoded according to a specific second syntax, but not closed captioning data encoded according to any other syntax, then the following steps are performed. A byte is extracted from a beginning of the sequence representing a user data length. A byte is also extracted following the user data length byte in the sequence, which represents a user data type.

Abstract: A statistical multiplexing apparatus and method for generating and combining a plurality of encoded video bit streams. A storage device contains pre-stored a priori statistics indicative of the encoding complexity of the video signals from which the encoded video bit streams will be generated. The pre-stored a priori statistics may include inter-pixel differences in the same picture or between multiple pictures or pre-encoding a priori statistics generated during a preliminary encoding of the video signals. Examples of pre-encoding a priori statistics include the number of bits per picture at a given quantization level, an average quantization level, picture types, scene change locations and repeat field for one or more of the video bit streams. The video signals are applied to encoders which compress the signals in accordance with bit allocation decisions generated by a statistics computer.

Abstract: A process and apparatus for encoding are provided, wherein fields of a digital signal are processed to detect repeat fields. Adjacent pairs of the non-repeated fields are organized into frames. A determination is made whether to encode each of the frames as an intraframe, a predicted frame or a bidirectionally predicted frame. The frames are encoded in a specific, predefined order relative to the order of capture of the frames and the type of frame. After each bidirectionally predicted frame that immediately precedes one of the detected repeat fields, encoding of a frame is delayed for one field time. Encoding is paused after encoding each reference frame that is the very next reference frame to be encoded after a second reference frame, which second reference frame immediately precedes one of the detected repeat fields. A process and apparatus for statistically multiplexing multiple encoded digital video signals are also provided.

Abstract: Methods and apparatus for ATM segmentation and reassembly (SAR) which provide efficient transfer of ATM cell data between an ATM network and a set top box or other processing system. Reassembly operations are performed using a receive ring which stores an array of pointers. Each of the pointers specifies the address of a cell buffer suitable for storing a received ATM cell. Received ATM cells are first filtered to determine if the cells should be accepted. When a given cell is accepted, a pointer retrieved from the receive ring is used to determine the address of a cell buffer in which that cell will be stored. Host CPU software directing the operation of the SAR device periodically services the receive ring to prevent overflow. The host CPU software services the receive ring by sequentially stepping through the ring entries and linking the pointer for each stored cell into a chain of pointers maintained for the VCI on which that stored cell was received.

Abstract: A structure and a format for providing a video signal encoder under the MPEG standard are provided. In one embodiment, the video signal interface is provided with a decimator for providing input filtering for the incoming signals. In one embodiment, the central processing unit (CPU) and multiple coprocessors implements DCT and IDCT and other signal processing functions, generating variable length codes, and provides motion estimation and memory management. The instruction set of the central processing unit provides numerous features in support for such features as alpha filtering, eliminating redundancies in video signals derived from motion pictures and scene analysis. In one embodiment, a matcher evaluates 16 absolute differences to evaluate a "patch" of eight motion vectors at a time.

Abstract: A statistical multiplexing apparatus and method for generating and combining a plurality of encoded video bit streams. A storage device contains pre-stored a priori statistics indicative of the encoding complexity of the video signals from which the encoded video bit streams will be generated. The pre-stored a priori statistics may include inter-pixel differences in the same picture or between multiple pictures or pre-encoding a priori statistics generated during a preliminary encoding of the video signals. Examples of pre-encoding a priori statistics include the number of bits per picture at a given quantization level, an average quantization level, picture types, scene change locations and repeat field for one or more of the video bit streams. The video signals are applied to encoders which compress the signals in accordance with bit allocation decisions generated by a statistics computer.

Abstract: An apparatus and method for compressing multiple resolution versions of a video signal are disclosed. A first resolution version of a video signal is applied to an input of a first video compressor and to an input of a video scaler. The first video compressor encodes the first resolution version of the video signal to generate a first compressed video bit stream. The video scaler generates a reduced resolution version of the video signal from the first resolution version. The reduced resolution version is supplied to a second video compressor and to the first video compressor. The first video compressor utilizes the reduced resolution version of the video signal in performing a hierarchical motion estimation (ME) search as part of the encoding process for the first resolution version. The second video compressor encodes the reduced resolution version to generate a second compressed bit stream.

Abstract: An encoder system includes an internal counter (PTS or presentation time stamp counter). The counter provides information which enables the encoder system to resynchronize itself in the event synchronization with the video input stream is lost. Preferably, the counter is implemented in software. The encoder system also include a comparator (preferably implemented in software). The comparator is able to determine if particular regions of the input video stream have been captured at an expected time according to the internal counter within a predetermined error window by comparing the actual capture time with the expected capture time. In general, if the encoder system is synchronized with the incoming video stream, each successive blanking or active region will be captured at its expected time according to the internal counter within a predetermined error window. In this event, the timing of the various modules of the encoder system (e.g., preprocessing, spatial encoding, etc.

Abstract: A method and system are provided for correcting a pitch of a human generated vocal signal. A human vocal signal is received at a first input. A reference signal having correct pitch is received at a second input. The pitch of the human vocal signal is then corrected by shifting the pitch of the human vocal signal to match the pitch of the reference signal, e.g., using pitch shifter circuitry.

Abstract: In accordance with an illustrative embodiment of the invention, a composite video signal is decoded as follows. A filtered and optionally re-sampled luminance component is obtained by vertical low-pass filtering the composite video signal using a vertical low-pass filter. The vertical low-pass filter may also be a re-sampler so that the output is optionally a filtered and re-sampled luminance signal. (Note that the use of a single vertical low-pass filter and re-sampler is more efficient than the prior art which uses a luma comb filter followed by a vertical filter/re-sampler to obtain the filtered and optionally re-sampled luminance component). Filtered and re-sampled chrominance components are obtained by first vertically high-pass filtering and re-sampling the composite video signal using a vertical high pass filter/re-sampler. This results in filtered and re-sampled but still quadrature modulated chroma signals.

Abstract: A method and apparatus for single-buffered display capture which eliminates a "tearing" problem inherent in certain conventional video display techniques. A video signal including a sequence of frames each having an even field and an odd field is applied to a video capture circuit. First and second sets of lines each representing a different subset of all the lines in a given even or odd field are captured in the video capture circuit and displayed by a video display circuit. The video capture circuit captures the first set of lines in an even field of the video signal during a time period in which the video display circuit displays the second set of lines in the even field. The video capture circuit also captures the second set of lines in an odd field of the video signal during a time period in which the video display circuit displays the first set of lines in the odd field.

Abstract: A structure and a format for providing a video signal encoder under the MPEG standard are provided. In one embodiment, the video signal interface is provided with a decimator for providing input filtering for the incoming signals. In one embodiment, the central processing unit (CPU) and multiple coprocessors implements DCT and IDCT and other signal processing functions, generating variable length codes, and provides motion estimation and memory management. The instruction set of the central processing unit provides numerous features in support for such features as alpha filtering, eliminating redundancies in video signals derived from motion pictures and scene analysis. In one embodiment, a matcher evaluates 16 absolute differences to evaluate a "patch" of eight motion vectors at a time.

Abstract: Methods and apparatus for performing dual prime motion estimation on video fields or frames of a video signal. A 16.times.16 motion estimator generates a same-parity match vector M.sub.-- SP and an opposite-parity match vector M.sub.-- OP for a current macroblock of a current field using a reference macroblock from each of a previous same-parity and opposite-parity field. A dual prime motion estimator receives the M.sub.-- SP and M.sub.-- OP match vectors for the current macroblock, and generates a base motion vector MV and a delta motion vector DMV for the current macroblock. In a first embodiment, the dual prime motion estimator generates MV and DMV by setting MV equal to M.sub.-- SP and then selecting DMV such that the opposite-parity vector OPV to be computed by a decoder is as close as possible to M.sub.-- OP. In a second embodiment, OPV is set equal to M.sub.-- OP and MV and DMV are selected such that MV is as close as possible to the same-parity match vector M.sub.-- SP.

Abstract: A structure and a method for providing a video signal encoder under the MPEG-1 and MPEG-2 standards are provided. In one embodiment, a novel scheme for mapping an image to an external memory allows fetching of video data by either field of frame. In addition, an automatic reload of a DMA channel memory allows automatic fetching of an entire 20.times.20 luma reference picture area, or a 12.times.12 chroma reference picture area, while crossing the minimal number of DRAM page boundaries. A novel dequantization instruction in the CPU of the video signal encoder allows efficient oddification of DCT coefficients according to MPEG-1 and MPEG-2 standards.

Abstract: An MPEG audio/video decoder has memories, a signal processing unit (SPU) including a multiplier and a butterfly unit, a main CPU, and a memory controller which are time division multiplexed between decoding video and audio data. For audio decoding, the butterfly unit determines combinations of components of a frequency-domain vector to reduce the number of multiplies required to transform to the time domain (matrixing). Matrixing is interwoven with MPEG filtering to increase throughput of the decoder by increasing parallel use of the multiplier, the butterfly unit, and a memory controller. A widowing process for the MPEG standard uses only independent components of the audio vectors. This reduces the required number of components to be stored, thereby reducing the size of required memory, the time to write the components after matrixing, and the time to retrieve the components for windowing.

Abstract: A method of retrieving image information is disclosed in which a reference block is selected which overlies three sections of an image stored in a memory having two banks. Exactly two of the sections of the image are stored in the same bank of the memory. A sequence in which to read the three sections is selected such that the two sections in the same bank are not read consecutively. Each section of the image underlying the reference block is read in the selected sequence to retrieve the image information.

Abstract: A method and apparatus for reading and writing data into a random access memory array having a dummy bit. The method includes the steps of providing a clock signal having two edges, one going from low to high and the other going from high to low. The edge going to high from low triggers an enable signal. The enable signal substantially simultaneously triggers a main wordline signal and a dummy wordline signal, the main wordline signal initiating a memory access process while the dummy wordline signal causes the generation of a dummy bit signal from the dummy bit, the combination of the main wordline signal and the dummy bit signal permitting memory access. The dummy bit signal shuts off the enable signal, which in turn causes the memory access process to be terminated and the memory array to go into a bit line precharging stage in preparation for a next read or write cycle, whereby bit line precharging may be commenced prior to the end of the clock cycle.