Abstract: An apparatus for, and method of, generating a k-bit pseudorandom number using m storage devices, m being less than k, is provided. The apparatus has interconnections among the storage devices. The interconnections include modulo-2 adders, and preferably 2-input modulo-2 adders, providing feedback to the storage devices. Some adders have outputs coupled to inputs of the storage devices while others have outputs coupled to k output lines. The interconnections are derived according to an m'th order generating polynomial and arranged to implement the generating function thereby outputting k bits on the k output lines each cycle of a clock signal common to the storage devices.