Patents Assigned to Cactus Materials, Inc.
  • Patent number: 12720904
    Abstract: A method of manufacturing a semiconductor substrate having a deep junction, forming at least one p+ region (n+ region) on a front side of a p-type (n-type) high-resistance wafer; and forming at least one n+ region (p+ region) on a front side of a n-type (p-type) high-resistance wafer. The method further includes aligning the at least one p+ region (n+ region) on a front side of a p-type (n-type) high-resistance wafer with the at least one n+ region (p+ region) on a front side of a n-type (p-type) high-resistance wafer; and bonding the front sides of the high-resistance wafers to form a wafer assembly having at least one deep p-n junction at a depth of at least 1 micron from the backside of the n-type (p-type) high-resistance wafer.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: August 25, 2026
    Assignee: Cactus Materials, Inc.
    Inventors: Rafiqul Islam, Sager Ayyoub
  • Patent number: 12686050
    Abstract: The instant disclosure is directed to passivated silver nanoparticle coatings and methods of making the same. A method may comprise obtaining a substrate having a surface, exposing the surface to a plurality of silver nanoparticles, applying a nucleating agent to the silver nanoparticles to form a plurality of silver cores, and passivating the silver cores by applying a sulfidation agent to the silver cores to form silver sulfide shells around the silver cores, thereby forming a coating comprising a plurality of sulfidated silver nanoparticles having a core-shell structure. The method may be used to form a coating comprising a plurality of sulfidated silver nanoparticles having a core-shell structure.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: July 21, 2026
    Assignees: Arizona Board of Regents on behalf of Arizona State University, CACTUS MATERIALS, INC.
    Inventors: Rafiqul Islam, Francois Perreault
  • Patent number: 12191410
    Abstract: Semiconductor devices comprising a semiconductor edge filter, a first light absorbing region overlying the semiconductor edge filter and a second light absorbing region underlying the semiconductor edge filter are disclosed. The semiconductor edge filter has a high reflectivity over a first wavelength range absorbed by the overlying light absorbing region and a high transmission over a second wavelength range absorbed by the underlying light absorbing region.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: January 7, 2025
    Assignee: Cactus Materials, Inc.
    Inventors: Ding Ding, Philip Dowd