Abstract: A method and an apparatus for determining functional coverage of a design for a device under test (DUT), the design being encapsulated in a DUT circuit design specification, in a test environment during a design test verification process. The method and apparatus utilize a coverage metric constructed from a plurality of coverage items. A first step involves obtaining a coverage group from the DUT design, for examining during the design test verification process. The coverage group includes at least one functional coverage item. Then, a set of input values is provided to the design test verification process. Next, design test verification process is performed with the set of input test values to obtain a value for each coverage item. Next step involves examining obtained coverage by comparing the value obtained from each coverage item with a coverage goal. Finally, the set of input test value is automatically altered in accordance with the examination of the obtained coverage.