Patents Assigned to Cadence Design Sytems, Inc.
  • Automatic insertion of clocked elements into an electronic design to improve system performance
    Patent number: 7207024
    Abstract: A method of improving a design of an electronic circuit includes generating the design, specifying one or more pipeline locations of the design, modifying the one or more pipeline locations of the design, and communicating the results to a user.
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: April 17, 2007
    Assignee: Cadence Design Sytems, Inc.
    Inventor: Louis K. Scheffer