Abstract: An apparatus is disclosed for demultiplexing digital signals which utilize two framing sequences, such as the DS1C and DS2 signals of Digital Telephony, to provide framing and pulse stuffing synchronization control information.
Abstract: Frame bit synchronizer for a framing pattern sequence consisting of M Bits distributed in a serial bit stream as single bits at intervals of a fixed number N, of bits, as measured from the start of one framing bit to the start of the next. The system initially operates in a framing mode, searching for frame, until the framing pattern sequence has been determined, upon which event the operation shifts to an in-frame monitoring mode for detecting errors in the framing pattern sequence in the serial bit stream as received.
Abstract: A loopback circuit for use in testing a telephone line between the central office and a subscriber's equipment. The loopback circuit is located at the subscriber's end of the line and is powered solely by the normal central office power source.
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