Abstract: This is a 32-bit combined arithmetic unit and stack processor (designated as the ASP chip) designed to be a simple, flexible, yet powerful building block for a high level language computer. The ASP is a 3-micron CMOS chip which has run high level programs at 12.5 MHz. When combined with the right hardware and compiler, it will run procedural language programs efficiently. It requires extra hardware to build a complete system, so it is to be mainly where speed is critical; but, employs greatly simplified hardware and software designs. A basic ASP combines arithmetic and stack manipulation functions and is capable of performing 227 different instructions to implement the high level language. A minimum of two ASPs are required to construct a stack-oriented high level language computer.
Abstract: A network comprising analog amplifiers with a resistive interconnection matrix that connects each amplifier output to the input of all other amplifiers. The connections embodied in the matrix are achieved with conductances whose values are computed in accordance with the set of decomposition functions for which the solution is sought. In addition to the specified connectivity implemented. Further included is a second matrix that connects externally applied voltages to the amplifier inputs via resistors whose values are also computed in accordance with the set of decomposition functions for which the solution is sought. Still further and in accordance with another aspect of the invention, means are included for varying the amplifier gains from an initial low value to an ultimately high value in the process of arriving at a solution to an applied problem.
Type:
Grant
Filed:
November 7, 1985
Date of Patent:
January 12, 1988
Assignees:
American Telephone and Telegraph Company, AT&T Bell Labs., Calif. Institute of Technology