Abstract: A process for making stacked high voltage rectifiers includes initially doping a plurality of silicon wafers with paint-on dopants applied with an applicator that is gradually moved from the center to the outer edge of each wafer while the wafer is peripherally supported and rotated sufficiently slowly to prevent spin-off and runover of each dopant onto the reverse side of the wafer. The dopants are driven in by heating in a diffusion furnace. The same slow rotation and moving applicator technique then is used to coat only the N-doped side of the wafer with a paint-on noble metal dopant. The noble metal is driven in using a diffusion furnace at a temperature that is selected in accordance with the measured reverse recovery time of the wafer prior to noble metal diffusion.The wafers are silver coated and stacked, and a compression jig is used to exert compressive force on the stack while it is heated in a alloying furnace to a temperature sufficiently high to cause "wetting" of the silver.

Abstract: A process for making stacked high voltage rectifiers includes initially doping a plurality of silicon wafers with paint-on dopants applied with an applicator that is gradually moved from the center to the outer edge of each wafer while the wafer is peripherally supported and rotated sufficiently slowly to prevent spin-off and runover of each dopant onto the reverse side of the wafer. The dopants are driven in by heating in a diffusion furnace. The same slow rotation and moving applicator technique then is used to coat only the N-doped side of the wafer with a paint-on noble metal dopant. The noble metal is driven in using a diffusion furnace at a temperature that is selected in accordance with the measured reverse recovery time of the wafer prior to noble metal diffusion.The wafers are silver coated and stacked, and a compression jig is used to exert compressive force on the stack while it is heated in a alloying furnace to a temperature sufficiently high to cause "wetting" of the silver.

Abstract: A process for making stacked high voltage rectifiers includes initially doping a plurality of silicon wafers with paint-on dopants applied with an applicator that is gradually moved from the center to the outer edge of each wafer while the wafer is peripherally supported and rotated sufficiently slowly to prevent spin-off and runover of each dopant onto the reverse side of the wafer. The dopants are driven in by heating in a diffusion furnace. The same slow rotation and moving applicator technique then is used to coat only the N-doped side of the wafer with a paint-on noble metal dopant. The noble metal is driven in using a diffusion furnace at a temperature that is selected in accordance with the measured reverse recovery time of the wafer prior to noble metal diffusion.The wafers are silver coated and stacked, and a compression jig is used to exert compressive force on the stack while it is heated in an alloying furnace to a temperature sufficiently high to cause "wetting" of the silver.

Abstract: A semiconductor abrupt junction having a relatively heavily doped region of first conductivity type, a relatively lightly doped region of opposite conductivity type, and immediately adjacent the effective junction, a thin "recombination layer" of first conductivity type and of dopant concentration intermediate that of the two junction regions. Preferably, the recombination layer overlaps the forward biased depletion region of the junction and has a thickness (typically 50 A to 200 A) much less than that of the junction depletion region under reverse bias. The recombination layer dopant ions thereby provide recombination-generation centers only where beneficial to improve the forward and reverse recovery times of the junction without degrading the steady state reverse current characteristics thereof. By further utilizing a very shallow (less than about 800 A) heavily doped region, very low forward turn-on voltage is achieved. The junction may be fabricated by controlled implantation of dopant ions.

Abstract: The on-to-off switching time of a junction transistor is reduced by forward connecting a recombination layer diode between the base and collector of the transistor. Preferably, the diode comprises a semiconductor abrupt junction of the type having a relatively heavily doped region of first conductivity type, a relatively lightly doped region of opposite conductivity type, and immediately adjacent the effective junction, a thin "recombination layer" of a carrier recombination-generation type material with a dopant concentration intermediate that of the two junction regions. Such a diode exhibits very low forward turn-on voltage and fast forward and reverse recovery times. The diode functions to bypass base-collector toward current of the transistor so as to reduce excess stored charge at the transistor collector-base junction, thereby effectively eliminating the storage delay time typically associated with junction transistor turn-off.