Abstract: A method of operation within an integrated-circuit processing device having an enhanced combined-arithmetic capability. In response to an instruction indicating a combined arithmetic operation, the processor generates a dot-product of first and second operands, adds the dot-product to an accumulated value, and then outputs the sum of the accumulated value and the dot-product.
Type:
Grant
Filed:
October 9, 2007
Date of Patent:
February 21, 2012
Assignee:
Calos Fund, LLC
Inventors:
Brucek Khailany, William James Dally, Raghunath Rao, DeForest Tovey