Abstract: A digital signal processor for interpolating a gain (coefficient) to be applied to a digital signal, the processor including: first memory means for storing a target gain coefficient; second memory means for storing a current gain coefficient; response determining means for determining an output gain coefficient based on the target gain coefficient and the current gain coefficient; means for storing the output gain coefficient in the second memory means in place of the current gain coefficient, to be used as the current gain coefficient in subsequent operations. In this way, a gain coefficient interpolator can be implemented using hardware rather than the previous DSP software approach.