Patents Assigned to Cambridge Semiconductor Limited
  • Publication number: 20140355314
    Abstract: We describe a method of controlling turn off time delay of a switching device of a switch mode power converter (SMPC). The SMPC has an inductive component comprising an input winding coupled to receive power from an input; and a switching device to, when on, conduct input winding current. In embodiments the method comprises applying turn on and turn-off signals to the switching device; applying at least one turn off signal, to initiate turning off of the switching device, and detecting a sensing signal from a further winding of the inductive component, inductively coupled to the input winding, to thereby indicate an end of a turn off time delay or duration. The method controls the turn on signal for a subsequent switching cycle of the SMPC device to regulate the turn off delay time.
    Type: Application
    Filed: May 21, 2014
    Publication date: December 4, 2014
    Applicant: Cambridge Semiconductor Limited
    Inventors: Paul Ryan, Johan Piper
  • Patent number: 8866252
    Abstract: We describe a RESURF semiconductor device having an n-drift region with a p-top layer and in which a MOS (Metal Oxide Semiconductor) channel of the device is formed within the p-top layer.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: October 21, 2014
    Assignee: Cambridge Semiconductor Limited
    Inventors: Tanya Trajkovic, Florin Udrea, Vasantha Pathirana, Nishad Udugampola
  • Publication number: 20140232187
    Abstract: The present invention generally relates to powering a switching controller of a switch mode power converter (SMPC), and more particularly to a method of providing power to a switching controller of a SMPC, to a charging circuit for supplying charge to a charge store for providing power to a switching controller of a SMPC, and to an SMPC comprising such a circuit.
    Type: Application
    Filed: February 19, 2014
    Publication date: August 21, 2014
    Applicant: Cambridge Semiconductor Limited
    Inventors: Paul Ryan, Johan Piper
  • Patent number: 8482031
    Abstract: This invention generally relates to lateral insulated gate bipolar transistors (LIGBTs), for example in integrated circuits, methods of increasing switching speed of an LIGBT, a method of suppressing parasitic thyristor latch-up in a bulk silicon LIGBT, and methods of fabricating an LIGBT. In particular, a method of suppressing parasitic thyristor latch-up in a bulk silicon LIGBT comprises selecting a current gain ?v for a vertical transistor of a parasitic thyristor of the LIGBT such that in at least one predetermined mode of operation of the LIGBT ?v<1??p where ?p is a current gain of a parasitic bipolar transistor having a base-emitter junction formed by a Schottky contact between the a semiconductor surface and a metal enriched epoxy die attach.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: July 9, 2013
    Assignee: Cambridge Semiconductor Limited
    Inventors: Florin Udrea, Vasantha Pathirana, Tanya Trajkovic, Nishad Udugampola
  • Patent number: 8446746
    Abstract: This invention relates to SMPS controllers employing primary side sensing. We describe a system for identifying a knee point in a sensing waveform, at which the output voltage of the SMPS may be sampled accurately on the primary side. The system identifies the knee point, broadly speaking, by tracking a portion of a power transformer voltage waveform, and samples the voltage waveform at the knee point to determine the SMPS output voltage. In preferred embodiments this technique is implemented using a circuit akin to a decaying peak detector, providing a timing signal indicating detection of the knee point. Sample/hold and error amplifier circuits may be employed to achieve output voltage regulation.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: May 21, 2013
    Assignee: Cambridge Semiconductor Limited
    Inventors: David Robert Coulson, Johan Piper, David Michael Garner
  • Patent number: 8415832
    Abstract: This invention generally relates to cable compensation, and is particularly applicable to cable compensation for an AC-DC voltage converter. In one embodiment, a cable compensation apparatus for compensating voltage drop of a cable connected between an electrical power supply and an electrical device comprises: a first capacitor; a timer circuit to time a predetermined time period; a current source to supply to said first capacitor during substantially said predetermined time period a first current substantially proportional to an output current outputted by the power supply to the cable; and a control circuit to adjust an output voltage outputted by said power supply to said cable dependent on a voltage on said first capacitor. The compensation in some embodiments is programmable by means of a discrete capacitor component.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: April 9, 2013
    Assignee: Cambridge Semiconductor Limited
    Inventors: David Robert Coulson, David Michael Garner, Johan Piper
  • Patent number: 8415712
    Abstract: This invention generally relates to LIGBTs, ICs comprising an LIGBT and methods of forming an LIGBT, and more particularly to an LIGBT comprising a substrate region of first conductivity type and peak dopant concentration less than about 1×1017/cm3; a lateral drift region of a second, opposite conductivity type adjacent the substrate region and electrically coupled to said substrate region; a charge injection region of the first conductivity type to inject charge toward said lateral drift region; a gate to control flow of said charge in said lateral drift region; metal enriched adhesive below said substrate region; and an intermediate layer below said substrate region to substantially suppress charge injection into said substrate region from said metal enriched adhesive.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: April 9, 2013
    Assignee: Cambridge Semiconductor Limited
    Inventors: Florin Udrea, Vasantha Pathirana, Tanya Trajkovic, Nishad Udugampola
  • Patent number: 8411468
    Abstract: We describe a resonant discontinuous power converter including a magnetic energy storage device, and a bipolar junction transistor (BJT) switch having a collector terminal coupled to repetitively switch power from the input on and off to said magnetic energy storage device such that power is transferred from the input to the output. During an off-period of said BJT switch a voltage on said magnetic energy storage device and on said collector terminal of said BJT is at least partially resonant. The power converter includes a voltage clamping circuit to clamp a base voltage on a base terminal of said BJT during a resonant portion of said off-period to limit an excursion of a collector voltage on said collector terminal of said BJT towards or beyond an emitter voltage of said BJT during said resonant portion of said off-period, in particular to inhibit reverse bias of a base emitter junction of the transistor.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: April 2, 2013
    Assignee: Cambridge Semiconductor Limited
    Inventors: Vinod A. Lalithambika, Paul Ryan, David M. Garner, Russell Jacques
  • Patent number: 8304316
    Abstract: In a power semiconductor device and a method of forming a power semiconductor device, a thin layer of semiconductor substrate is left below the drift region of a semiconductor device. A power semiconductor device has an active region that includes the drift region and has top and bottom surfaces formed in a layer provided on a semiconductor substrate. A portion of the semiconductor substrate below the active region is removed to leave a thin layer of semiconductor substrate below the drift region. Electrical terminals are provided directly or indirectly to the top surface of the active region to allow a voltage to be applied laterally across the drift region.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: November 6, 2012
    Assignee: Cambridge Semiconductor Limited
    Inventors: Florin Udrea, Gehan Anil Joseph Amaratunga, Tanya Trajkovic, Vasantha Pathirana
  • Patent number: 8269421
    Abstract: This invention generally relates to lighting controller, more particularly to electronic ballast circuits, sometimes referred to as electronic control gears (ECG) or gas discharge lamps. An electronic ballast for a gas discharge lamp, the electronic ballast comprising: a power input circuit to provide a dc voltage supply; a SEPIC converter having a converter input coupled to said dc voltage supply and having a dc voltage output; and a push-pull output stage coupled to said dc voltage output to provide an ac voltage for driving said lamp, said push-pull output stage comprising a pair of inductive elements each having a first connection to one another and to said dc voltage output and a second connection to a respective switch.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: September 18, 2012
    Assignee: Cambridge Semiconductor Limited
    Inventor: David Vail
  • Patent number: 8199538
    Abstract: We describe a switch mode power supply (SMPS) current regulation system comprising: a current sense signal input sensing a primary current of the SMPS; a voltage sense input to receive a voltage sense signal from a primary or auxiliary winding; a switch drive signal input to receive a drive signal; a timing signal generator coupled to said voltage sense input and to said drive signal input to generate a timing signal T0 indicating a duration of a period for which current is flowing through said primary winding and a timing signal T1 indicating a duration of a period for which current is flowing through said secondary winding; and a regulator to provide an output current regulation signal responsive to an average of the current sense signal multiplied by a ratio of T1 to T0, and wherein T0 and/or T1 are generated responsive to the voltage or current sense signal.
    Type: Grant
    Filed: May 21, 2009
    Date of Patent: June 12, 2012
    Assignee: Cambridge Semiconductor Limited
    Inventor: Johan Piper
  • Patent number: 8174069
    Abstract: A power semiconductor device has a top surface and an opposed bottom surface below a part of which is a thick portion of semiconductor substrate. At least a portion of a drift region of the device has either no or only a thin portion of semiconductor substrate positioned thereunder. The top surface has a high voltage terminal and a low voltage terminal connected thereto to allow a voltage to be applied laterally across the drift region. At least two MOS (metal-oxide-semiconductor) gates are provided on the top surface. The device has at least one relatively highly doped region at its top surface extending between and in contact with said first and second MOS gates. The device has improved protection against triggering of parasitic transistors or latch-up without the on-state voltage drop or switching speed being compromised.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: May 8, 2012
    Assignee: Cambridge Semiconductor Limited
    Inventors: Florin Udrea, Vasantha Pathirana, Tanya Trajkovic, Nishad Udugampola
  • Patent number: 8035472
    Abstract: The invention relates to swinging inductors of a stepped-gap construction. We describe an inductor core structure having first and second core segments, constructed and arranged such that distal ends of legs of the first core segment are paired with distal ends of legs of the second core segment in an opposing relation. The at least one distal ends of the first core segment has a ridge projecting therefrom and is paired with the at least one distal ends of the second core segment which has a ridge projecting therefrom in an opposing relation, such that opposingly paired projecting ridges form a cross arrangement.
    Type: Grant
    Filed: September 14, 2009
    Date of Patent: October 11, 2011
    Assignee: Cambridge Semiconductor Limited
    Inventor: David Vail
  • Patent number: 8022744
    Abstract: Embodiments include a signal generator circuit for generating a time-varying signal, comprising capacitive element; FET to supply to or from the capacitive element a current matched to the FET drain current; a bias voltage generator to provide a bias voltage to the FET gate, wherein: the capacitances per unit area of the capacitive element and the FET gate are matched; the bias voltage is substantially equal to a sum of a first voltage substantially proportional to a reference voltage and a second voltage substantially proportional to temperature; the FET source-gate voltage substantially equal to the sum of the bias voltage and the gate threshold voltage, the bias voltage and a further voltage approximately equal to the gate threshold voltage summed to determine the FET source-gate voltage, the circuit to control a time period of the time-varying signal dependent on the current supply.
    Type: Grant
    Filed: October 3, 2008
    Date of Patent: September 20, 2011
    Assignee: Cambridge Semiconductor Limited
    Inventors: Vinod A. Lalithambika, David M. Garner
  • Patent number: 8023294
    Abstract: We describe a switch mode power supply having a power input, a switch, a transformer, and a power output. The transformer has a primary winding coupled to said power input via said switch, and a secondary winding coupled to said power output. The transformer further comprises an auxiliary winding and a coupling structure capacitatively coupled to said secondary winding of said transformer; wherein said coupling structure does not comprise a shield or screen between said primary and secondary windings. The switch mode power supply further comprises a coupling capacitor connected between said coupling structure and said auxiliary winding to provide a noise suppression voltage from said auxiliary winding to said secondary winding to at least partially cancel a common mode noise voltage on said secondary winding from unshielded coupling from said primary winding.
    Type: Grant
    Filed: July 22, 2008
    Date of Patent: September 20, 2011
    Assignee: Cambridge Semiconductor Limited
    Inventors: Paul Ryan, Joe Michael Leisten
  • Patent number: 7961484
    Abstract: We describe a switching power converter comprising a bipolar switching device (BJT or IGBT) switching an inductive load, and including a closed-loop control system. The control system comprises a voltage sensing system to sense a voltage on a collector terminal of the switching device and provide a voltage sense signal; a controller; and a drive modulation system coupled to an output of the controller for modulating a drive to the control terminal of said bipolar switching device responsive to a controller control signal; wherein said controller is configured to monitor changes in the sensed voltage during a period when said switching device is switched on and to control said drive modulation system to control the degree of saturation of said bipolar switching device when the device is switched on and hence improve turn-off times.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: June 14, 2011
    Assignee: Cambridge Semiconductor Limited
    Inventors: Vinod A. Lalithambika, Paul Ryan, David Michael Garner, Russell Jacques
  • Patent number: 7944722
    Abstract: This invention relates to SMPS controllers employing primary side sensing. We describe a system for identifying a knee point in a sensing waveform, at which the output voltage of the SMPS may be sampled accurately on the primary side. The system identifies the knee point by fitting a tangent to a portion of a power transformer voltage waveform, and samples the voltage waveform at the knee point to determine the SMPS output voltage. In preferred embodiments this technique is implemented using a decaying peak detector, providing a timing signal indicating detection of the knee point. Sample/hold and error amplifier circuits may be employed to achieve output voltage regulation.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: May 17, 2011
    Assignee: Cambridge Semiconductor Limited
    Inventors: David R. Coulson, Johan Piper, David M. Garner
  • Patent number: 7830130
    Abstract: This invention relates to control techniques and controllers for resonant discontinuous forward power converters (RDFCs). A method of controlling a resonant discontinuous forward converter (RDFC), said converter including a transformer with primary and secondary matched polarity windings and a switch to, in operation, cyclically switch DC power to said primary winding of said transformer, said converter further having a DC output coupled to said secondary winding of said converter, said method comprising: sensing a primary winding signal during an on period of said switch, said primary winding signal representing a current in said primary winding; comparing said sensed primary winding signal with a threshold value; and controlling one or both of an on and off duration of said switch in response to said comparison.
    Type: Grant
    Filed: April 2, 2007
    Date of Patent: November 9, 2010
    Assignee: Cambridge Semiconductor Limited
    Inventors: Russell Jacques, Paul Ryan, Catriona McKay, Devarahandi Indika Mahesh de Silva, David M. Garner, Vinod A. Lalithambika
  • Publication number: 20100246216
    Abstract: This invention relates to SMPS controllers employing primary side sensing. We describe a system for identifying a knee point in a sensing waveform, at which the output voltage of the SMPS may be sampled accurately on the primary side. The system identifies the knee point, broadly speaking, by tracking a portion of a power transformer voltage waveform, and samples the voltage waveform at the knee point to determine the SMPS output voltage. In preferred embodiments this technique is implemented using a circuit akin to a decaying peak detector, providing a timing signal indicating detection of the knee point. Sample/hold and error amplifier circuits may be employed to achieve output voltage regulation.
    Type: Application
    Filed: April 1, 2010
    Publication date: September 30, 2010
    Applicant: Cambridge Semiconductor Limited
    Inventors: David Robert Coulson, Johan Piper, David Michael Garner
  • Patent number: 7782083
    Abstract: Techniques for programming trimming circuitry of a power integrated circuit without the need for separate programming pins are disclosed. According to a first aspect of the invention, there is provided a power supply controller IC with internal circuitry, a plurality of external connections, the IC further comprising trimming circuitry with no external connections to the IC other than via shared ones of the external connections. The shared external connections can comprise a first connection comprising a data input for receiving data for programming the trimming circuitry, and a second, different connection comprising a select input to select between a data receiving mode for receiving data from the data input and a programming mode for programming the trimming circuitry using the received data.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: August 24, 2010
    Assignee: Cambridge Semiconductor Limited
    Inventors: Vinod A. Lalithambika, David M. Garner, David Robert Coulson, Zahid Ansari