Abstract: A memory comprises a two dimensional array of memory cells. Each memory cell comprises a first transistor, a second transistor and a capacitor. A multi-bit datum is stored as one of a plurality of voltage signal levels driven over a vertical input signal line and further across a source and a drain of the first transistor to be stored onto a gate of the second transistor. The first transistor is selected by a horizontal WR control line. The gate of the second transistor is connected to a first terminal of the capacitor. A second terminal of the capacitor is connected to a horizontal RD control line. The RD control line is driven to couple the second transistor to drive a signal onto a vertical output signal line during a read of the stored signal on the gate.

Abstract: A memory comprises a two dimensional array of memory cells. Each memory cell comprises a first transistor, a second transistor and a capacitor. A multi-bit datum is stored as one of a plurality of voltage signal levels driven over a vertical input signal line and further across a source and a drain of the first transistor to be stored onto a gate of the second transistor. The first transistor is selected by a horizontal WR control line. The gate of the second transistor is connected to a first terminal of the capacitor. A second terminal of the capacitor is connected to a horizontal RD control line. The RD control line is driven to couple the second transistor to drive a signal onto a vertical output signal line during a read of the stored signal on the gate.

Abstract: An image sensor system with an image sensor that generates a first image and a second image. The first and second images are transmitted to a processor in a time overlapping manner. By way of example, the images may be transferred to the processor in an interleaving manner or provided on separate dedicated busses.

Abstract: An image sensor with a light reader circuit coupled to a pixel array. The light reader circuit retrieves a first image and a second image generated by the pixel array. The image sensor may also include a memory controller and/or data interface that transfers the first and second images to an external device in an interleaving manner.

Abstract: An image sensor having one or more pixels within a pixel array. A vertical signal line across the pixel array conductively connects to a drain terminal of a transistor of one of the pixels. The drain terminal is driven to a first drain voltage via the vertical signal line so that the transistor enters a triode region. A gate of the transistor is placed into a tri-state during the triode region, the gate being at a first gate voltage prior to the tri-state. The drain terminal is driven to a second drain voltage during the tri-state, whereby the gate is capacitively coupled to a second gate voltage. The second drain voltage may be higher than the first drain voltage so as to effectuate a gate voltage boosting for the transistor. The transistor may be a reset transistor having a drain terminal conductively coupled to reset said photodetector.

Abstract: An image sensor with a light reader circuit coupled to a pixel array. The light reader circuit retrieves a first image and a second image generated by the pixel array. The image sensor may also include a memory controller and/or data interface that transfers the first and second images to an external device in an interleaving manner.

Abstract: An image sensor that has a temperature sensor. The temperature sensor senses the temperature of a pixel array of the image sensor. The sensed temperature is used to scale a dark frame image generated by the pixel array. The scaled dark frame image is subtracted from a light image frame generated by the pixel array. The scaled dark image frame compensates for temperature variations in the pixel array. The scaled dark image frame may be generated by multiplying the dark frame by a scale factor(s). The scale factor may be computed from an equation or determined from a look-up table. The equation or look-up table may compensate for thermal gradients across the pixel.

Abstract: An image sensor that has one or more pixels within a pixel array. The pixel array may be coupled to a control circuit and one or more subtraction circuits. The control circuit may cause each pixel to provide a first reference output signal and a reset output signal. The control circuit may then cause each pixel to provide a light response output signal and a second reference output signal. The light response output signal corresponds to the image that is to be captured by the sensor. The subtraction circuit may provide a difference between the reset output signal and the first reference output signal to create a noise signal that is stored in memory. The subtraction circuit may also provide a difference between the second reference output signal and the light response output signal to create a normalized light response output signal. The noise signal may then be subtracted from the normalized light response output signal to generate the output data of the sensor.