Abstract: A solid-state imaging apparatus includes: a plurality of pixels; a reference signal generating circuit configured to generate a ramp signal; a counter performing a counting operation according to the changing of the ramp signal; a read out circuit having a comparator comparing a signal read out from the pixel with the ramp signal, and converting an analog signal outputted from the pixel to a digital signal; and a control circuit configured to adjust a reset potential to be used when the comparator is reset, wherein the control circuit obtains a conversion value derived by converting an analog signal derived of a reset level of the pixel to a digital signal, and adjusts a reference potential based on the conversion value to make a dynamic range of A/D conversion follow the fluctuation of the reset level of the pixel.
Abstract: A semiconductor device array comprising highly densely arranged nano-size semiconductor devices is prepared by a simple method. The array comprises a porous body having cylinder-shaped pores formed by removing cylinder-shaped regions from a structure that includes a matrix member formed so as to contain silicon or germanium and the cylinder-shaped regions containing aluminum and dispersed in the matrix member, semiconductor regions formed in the pores, each having at least a p-n or p-i-n junction, and a pair or electrodes, arranged respectively on the top and at the bottom of the semiconductor regions. The semiconductor regions and the pair of electrodes form a plurality of semiconductor devices on a substrate.
Type:
Grant
Filed:
December 11, 2003
Date of Patent:
February 27, 2007
Assignee:
Canon Kabushiki Kasha
Inventors:
Akira Kuriyama, Hirokatsu Miyata, Albrecht Otto, Miki Ogawa, Hiroshi Okura, Kazuhiko Fukutani, Tohru Den