Abstract: A relaying module (68) includes a radio interface (88) and a processor (84). The radio interface is configured to wirelessly receive uplink messages originating in a wireless device (24) that communicates messages with a Base Station (BS) (32) in a communication network (20), and wirelessly transmit repeated uplink messages of at least some of the received uplink messages toward the BS. The processor is configured to hold one or more transmission constraints that define limitations of using network resources for wireless transmissions in the communication network, to receive one or more uplink messages from the wireless device, to select at least some of the received uplink messages for repeated transmission, to allocate to the selected uplink messages respective network resources so as to maximize performance of the communication network under the transmission constraints, and to transmit the selected messages as repeated messages toward the BS, in accordance with the allocated network resources.

Abstract: An apparatus for communication includes a transmission chain, an interference suppressor and a reception chain. The transmission chain is configured to transmit a transmitted signal. The interference suppressor is configured to produce suppression signals, by filtering reference signals drawn from the transmission chain. At least one of the reference signals is filtered in a frequency domain. The reception chain is configured to receive a signal distorted by at least an attenuated and delayed replica of the transmitted signal. The transmitted signal and the received signal are (i) synchronized in time and (ii) each includes one or more subcarriers selected from a common subcarrier-resource. The reception chain is further configured to process the received signal up to selected points, to subtract the suppression signals from the received signal at the selected points to produce an interference-suppressed signal, and to recover data carried in the received signal from the interference-suppressed signal.

Abstract: An apparatus includes a transmitter, a receiver and a combining element. The transmitter includes multiple coupling devices coupled to a coaxial network via multiple respective ports, and is configured to transmit multiple transmit signals via the coupling devices, and to receive from the coaxial network via the multiple coupling devices multiple reception signals. The receiver is configured to receive a combined signal of the multiple reception signals, interfered by multiple respective interfering signals that originate from the multiple transmit signals, and to process the combined signal to recover data carried in the reception signals. The combining element, included in at least one of the transmitter and the receiver, is configured to receive the multiple reception signals from the respective couplers, and to generate the combined signal with a suppressed level of the interference signals by setting at least a phase of at least one of the reception signals.

Abstract: A transceiver includes a transmission chain, a reception chain, an interference suppression module and a processor. The transmission chain transmits a downstream signal to a communication network. The reception chain receives an upstream signal including (i) upstream transmissions originating by client devices, and (ii) an interference signal created by leakage and reflections of the downstream signal. The reception chain includes a configurable switch for connecting or disconnecting the upstream signal. The interference suppression module applies to the downstream signal a filter response function for generating an interference suppression signal to be subtracted from the upstream signal at a selected suppression point.

Abstract: A digital synthesis channelizer includes a memory buffer and circuitry. The memory buffer stores samples of N input signals having a sampling rate Fsi. The N input signals are processed, prior to storing in the memory buffer, by an N-point time-frequency transform module. The circuitry includes at least P filters derived from a Low-Pass Filter whose stopband frequency depends on Fsi. The circuitry is configured to set a sampling time according to a predefined output sampling rate Fso=?·Fsi, ? being a predefined rate-conversion ratio, to select based on the sampling time one or more filters out of the at least P filters, and using the selected one or more filters, to generate, from at least some of the samples in the memory buffer, a filtered and interpolated output sample of an output signal that sums N digitally resampled by ? and frequency-shifted versions of the respective N input signals.

Abstract: An apparatus for communication includes a transmission chain, an interference suppressor and a reception chain. The transmission chain is configured to transmit a transmitted signal. The interference suppressor is configured to produce suppression signals, by filtering reference signals drawn from the transmission chain. At least one of the reference signals is filtered in a frequency domain. The reception chain is configured to receive a signal distorted by at least an attenuated and delayed replica of the transmitted signal. The transmitted signal and the received signal are (i) synchronized in time and (ii) each includes one or more subcarriers selected from a common subcarrier-resource. The reception chain is further configured to process the received signal up to selected points, to subtract the suppression signals from the received signal at the selected points to produce an interference-suppressed signal, and to recover data carried in the received signal from the interference-suppressed signal.

Abstract: A digital receiver includes a memory buffer and circuitry. The memory buffer stores samples of an input signal having a sampling rate Fsi. The circuitry includes P filter-families that each includes N filters derived from a prototype Low-Pass Filter (LPF) whose stopband frequency depends on an output sampling rate Fso=?·Fsi. The circuitry is configured to set a sampling time according to Fso, to select, based on the sampling time, multiple filter-families out of the P filter-families, and to construct, based on the N filters in each of the selected filter-families, N interpolated filters that are each aligned to the sampling time. The circuitry is further configured to calculate N filtered samples by applying the N interpolated filters to the samples in the memory buffer, and to generate a sample for an output signal of a frequency-slice of the input signal, by digitally down-converting the N filtered samples.