Abstract: The present invention provides an optical network unit having a control means. The control means uses programmable logic to cause the optical network unit to function within established protocols.

Abstract: A telecommunications customer service terminal provides telecommunications service between a telecommunications line and a plurality of telephones and/or data processing devices. The customer service terminal includes a housing having a base. A first cover is secured to the base to form a sealed first compartment within the housing. A second cover is removably secured to the base to form an unsealed second compartment within the housing. A connection board is mounted within the second compartment and includes a plurality of insulation displacement connectors for the connection of telephone lines that extend external to the customer service terminal. An electronic board is mounted within the first compartment, and electronic components thereon are electrically connected to the insulation displacement connectors.

Abstract: A technique for performing a time slot interchange in a processor. The TSI process is surrounded by a multiplexing/demultiplexing circuit for converting a plurality of PCM highways into a single input serial data stream. The mux/demux circuit includes elastic stores to align frames and shift resisters to mux/demux with a minimum of delay. The TSI processor includes an input and an output buffered series port, a pair of input buffers, one to receive even-numbered frames from the PCM highways and one to receive odd-numbered frames, and an output buffer. Data is read from the appropriate input buffer in a non-sequential fashion as commanded by the processor in accordance with information stored in connection arrays (address buffers). The data is then written to the output buffer sequentially. The timing of the reading and writing steps is optimized relative to free running buffered serial port pointers for each BSP to reduce the frame delay.

Abstract: A telecommunications system includes a telephone exchange and a customer services terminal whose input is connected to the telephone exchange, and whose plural outputs are individually connected to one of a plurality of telephone lines. A plurality of interface circuits within the customer services terminal are individually connected intermediate the input and one of the plural outputs. Self-test means provides for the testing of selected interface circuits. Loop-test means provides for the testing of selected telephone lines. A self-test relay is responsive to the self-test means and operates to disconnect the selected outputs from corresponding telephone lines as self-test conditions are applied to selected interface circuits as these interface circuits are disconnected from the selected telephone lines. The loop test means applies loop-test conditions to selected interface circuits, while the selected interface circuits and the corresponding outputs remain connected to the corresponding telephone lines.

Abstract: Customer services terminal input connected between telephone exchange and outputs. Interface circuits provide service between input and outputs Test means applies test conditions to interface circuits and/or to outputs associated with the interface circuits, and/or to ring/tip pairs associated with interface circuits, and/or to telephone lines associated with interface circuits Other interface circuits service input to other outputs Test means analog-to-digital converter includes reference input, analog measuring input, ground potential input, and test output Normally de-energized calibration relay has normally-closed switches and normally-open switches. Normally-closed switch connects reference voltage to reference input. Another normally-closed switch connects analog measuring input to test means generated voltage.

Abstract: A telecommunications system includes a customer services terminal that is connected intermediate a telephone exchange and a user location that has a plurality of telephone lines. The customer services terminal and/or the telephone lines are tested by providing a web server within the customer services terminal. The web server includes a graphic user interface that enables the selection of self-test to be applied to selected portions of the customer services terminal, and/or enables the selection of loop test to be applied to selected ones of the plurality of telephone lines. Selected self-tests are applied to selected portions of the customer services terminal, and/or selected loop-tests are applied to selected ones of the plurality of telephone lines, as a remainder of the customer services terminal and/or a remainder of the plurality of telephone lines remain operative to supply telecommunications services to the user-location.

Abstract: Apparatus for digitally driving a laser in a passive optical network includes a programmable current source having an output terminal connected to supply current to the laser. The programmable current source includes a plurality of output pins, each of the outputs pins has a voltage thereon, all of the output pins are connected to the output terminal, and one or more of the output pins is connected to the output terminal through a resistor. A controller supplies a digital control signal to the programmable current source to specify which of the output pins are to be turned on, to thereby determine the magnitude of a current supplied to the laser from the output terminal.

Abstract: The present invention provides apparatuses and methods for measurement and control of a laser in a passive optical network. In particular, prior to receiving a transmission grant, the laser is pre-driven at a current below a predetermined threshold to “pre-charge” the laser. Also, during the zero level measurement interval, the laser is driven at a non-zero level and the required zero level current is calculated.

Abstract: A modular multi-service telecommunication access device includes a controller card and card slots for six peripheral cards and a power supply. Any of several types of peripheral cards can be inserted into the six card slots. A card present/protocol scheme allows an inserted card to recognize its address and communicate same as well as its communication protocol to the controller card via a PCM highway. The controller card sends both signaling information and management information to the peripheral cards via another PCM highway. A unique communication protocol allows for both real time signaling information and non-real time management information to be sent on the same channel. A microprocessor on the controller card includes an algorithm for managing messages to the various peripheral cards in the various card slots. A unique tributary addressing scheme allows for a simplified address used by external users to be converted to a more detailed internal address.

Abstract: A telecommunication device for receiving and transmitting DS1 level signals that includes a 1/0 digital cross-connect switch, a GR-303 concentrator, and a frame relay aggregator switch in a single integrated device in one housing that fills less than two standard rack units. The device includes both active and standby/backup controller cards that communicate with eight quad framer cards through a bus located in the backplane. The communication through the backplane is via a 8.192 Mbps signal to and from each quad framer card, passed along a bus. The 8.192 Mbps signal is generated by multiplexing the four DS1 (E-1) signals on the quad framer card. The controller card that is active monitors the status of the DS1 channel associated with each framer and stores historical data about the status in spare buffer registers on each framer. Whenever a transition occurs to the standby/backup controller card, that card can obtain the historical status information from the framers to make the transition more seamless.

Abstract: A multiplexer for multiplexing and demultiplexing signals between a low-speed network and a higher speed network includes 7 quad DSX-1 cards and 1 spare card. The spare card is connected to the DSX-1 cards to allow the spare card to automatically be switched in for one of the DSX-1 cards or to allow interface electronics on the spare card to replace selected ones of interface electronics on different DSX-1 cards simultaneously. A pair of controller cards, a primary card and a secondary card, perform M1-3 multiplexing and demultiplexing and the DS-3 framing and transceiving. The controller cards can be selected or deselected in a short time period alarms are not set off and so that the transition is hitless by electronically enabling and disabling the transceiver. The multiplexer is connectable to 2 different T-3 links to provide network redundancy. An array of relays connected either controller card to either of the T-3 links.

Abstract: A technique for powering telephone lines using an unbalance current source and current sink; and a technique for improving attenuation/frequency distribution and return loss (impedance matching) of transformer-coupled wire-line communications circuits by using secondary series capacitance and an AC current pump signal source; and a generation of ringing voltage as positive voltage pulses with respect to a negative power supply voltage; and a technique for removal of AC power ripple by using an active linear floating filter for the purpose of powering telephone line circuits, and a technique for injection of real time tone samples into T1 transmissions circuits by use of a T1 framer idle code register.

Abstract: A technique for performing a time slot interchange in a processor. The TSI process is surrounded by a multiplexing/demultiplexing circuit for converting a plurality of PCM highways into a single input serial data stream. The mux/demux circuit includes elastic stores to align frames and shift resisters to mux/demux with a minimum of delay. The TSI processor includes an input and an output buffered serial port, a pair of input buffers, one to receive even-numbered frames from the PCM highways and one to receive odd-numbered frames, and an output buffer. Data is read from the appropriate input buffer in a non-sequential fashion as commanded by the processor in accordance with information stored in connection arrays (address buffers). The data is then written to the output buffer sequentially. The timing of the reading and writing steps is optimized relative to free running buffered serial port pointers for each BSP to reduce the frame delay.

Abstract: A multiplexer device for multiplexing and demultiplexing signals between a low-speed network including 28 DSX-1 signals and a relatively higher speed network including a DS-3 signal. The multiplexer device includes 7 quad DSX-1 cards and 1 spare card. The spare card is connected to the other 7 DSX-1 cards in a fashion that allows the spare card to automatically be switched in for one of the DSX-1 cards or to allow interface electronics on the spare card to replace selected ones of the interface electronics on various different DSX-1 cards simultaneously. A pair of controller cards, a primary card and a secondary card, perform the M1-3 multiplexing and demultiplexing and the DS-3 framing and transceiving. The controller cards can be selected or deselected by distributed logic in a sufficiently short time period so that alarms are not set off and so that the transition is hitless. This is accomplished by electronically enabling and disabling the transceiver.

Abstract: A technique for powering telephone lines using an unbalance current source and current sink; and a technique for improving attenuation/frequency distribution and return loss (impedance matching) of transformer-coupled wire-line communications circuits by using secondary series capacitance and an AC current pump signal source; and a generation of ringing voltage as positive voltage pulses with respect to a negative power supply voltage; and a technique for removal of AC power ripple by using an active linear floating filter for the purpose of powering telephone line circuits, and a technique for injection of real time tone samples into T1 transmissions circuits by use of a T1 framer idle code register.

Abstract: A technique for powering telephone lines using an unbalanced current source and current sink; and a technique for improving attenuation/frequency distribution and return loss (impedance matching) of transformer-coupled wire-line communications circuits by using secondary series capacitance and an AC current pump signal source; and a generation of ringing voltage as positive voltage pulses with respect to a negative power supply voltage; and a technique for removal of AC power ripple by using an active linear floating filter for the purpose of powering telephone line circuits, and a technique for injection of real time tone samples into T1 transmissions circuits by use of a T1 framer idle code register.

Abstract: A technique for powering telephone lines using an unbalance current source and current sink; and a technique for improving attenuation/frequency distribution and return loss (impedance matching) of transformer-coupled wire-line communications circuits by using secondary series capacitance and an AC current pump signal source; and a generation of ringing voltage as positive voltage pulses with respect to a negative power supply voltage; and a technique for removal of AC power ripple by using an active linear floating filter for the purpose of powering telephone line circuits, and a technique for injection of real time tone samples into T1 transmissions circuits by use of a T1 framer idle code register.

Abstract: A technique for powering telephone lines using an unbalance current source and current sink; and a technique for improving attenuation/frequency distribution and return loss (impedance matching) of transformer-coupled wire-line communications circuits by using secondary series capacitance and an AC current pump signal source; and a generation of ringing voltage as positive voltage pulses with respect to a negative power supply voltage; and a technique for removal of AC power ripple by using an active linear floating filter for the purpose of powering telephone line circuits, and a technique for injection of real time tone samples into T1 transmissions circuits by use of a T1 framer idle code register.