Abstract: Under the presence of an internally generated mandolin clock (MDN) or an externally generated mandolin clock (MDN'), an envelope clock (ENV-CLK) obtained in accordance with a lower bit output having three-bit signals (including the LSB) is supplied through AND gates to an envelope counter. The counter is set in an up count state in response to an output from a flip-flop set in response to a key on pulse. When a carry signal is generated by the envelope counter, the counter is set in a down count state. In the latter case, the fourth-bit signal from the LSB of the output from the binary counter is gated through the AND gate. The envelope counter counts down the envelope clock (ENV-CLK) having a period twice that of the envelope clock (ENV-CLK) in the up count state.