Abstract: Disclosed is a EEPROM flash memory array utilizing single transistor cells to provide read/write nonvolatile storage. The array includes a plurality of sectors, each oriented along the word line direction, and the sectors may include one or more word lines. An erase select transistor is provided for each sector and each word line includes a pass gate transistor which assists in both the programming and the erase operations.
Type:
Grant
Filed:
February 19, 1991
Date of Patent:
February 9, 1993
Assignee:
Catalyst Semiconductor Corporation
Inventors:
Darrell D. Rinerson, Steve K. Hsia, Christophe J. Chevallier, Chan-Sui Pang