Patents Assigned to Catena Networks, Inc.
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Publication number: 20050053228Abstract: A protection circuit for telecommunications equipment powered remotely through a twisted pair subscriber loop, comprising: a charge storage circuit, coupled to the subscriber loop through an arm switch in parallel with an inrush resistor, for storing charge received from the subscriber loop, the charge storage circuit coupled to the telecommunications equipment for providing the charge thereto; a fault detection circuit for setting a first signal during a period of normal operation of the protection circuit and for resetting the first signal for a predetermined period during a fault; a processor adapted for setting an arm signal during the period of normal operation of the protection circuit; and, an AND logic circuit coupled to the arm switch, fault detection circuit, and processor for comparing the first and arm signals and for setting a third signal for opening and closing the arm switch.Type: ApplicationFiled: June 29, 2004Publication date: March 10, 2005Applicant: Catena Networks, Inc.Inventors: Clive Mullins, Martin Bijman
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Publication number: 20050038651Abstract: Method and apparatus detect voice activity for spectrum or power efficiency purposes. The method determines and tracks the instant, minimum and maximum power levels of the input signal. The method selects a first range of signals to be considered as noise, and a second range of signals to be considered as voice. The method uses the selected voice, noise and power levels to calculate a log likelihood ratio (LLR). The method uses the LLR to determine a threshold, then uses the threshold for differentiating between noise and voice.Type: ApplicationFiled: February 17, 2004Publication date: February 17, 2005Applicant: Catena Networks, Inc.Inventors: Song Zhang, Eric Verreault
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Patent number: 6833991Abstract: A cooling apparatus attaches to a cabinet housing electronics for protecting the electronics from external elements. The cooling apparatus includes an exterior surface for exposure to the external elements and a coupling that attaches the exterior surface to the cabinet. When the cooling apparatus is attached to a surface of the cabinet, the exterior surface is maintained in a spaced-apart relationship from the cabinet, forming an enclosed channel having a pair of openings, one of the openings being located above the other. In such a manner, the cooling apparatus can be added to cool an existing, installed, in-place cabinet without requiring extensive modification to the existing cabinet.Type: GrantFiled: November 12, 2002Date of Patent: December 21, 2004Assignee: Catena Networks, Inc.Inventor: Adrianus Van Gaal
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Publication number: 20040221029Abstract: A method is provided for selecting a resource from a plurality of potential resources in order to provide a service in response to a service request. The method comprises the following steps. Aging services are determined by estimating which of the resources are likely to become available. One of the aging services is disconnected from its resource. The resource is then used for providing the service in the service request. In accordance with a further aspect of the present invention, an oldest service is determined. The oldest service is defined as the service that is most likely to be disconnected from its resource. The oldest service is disconnected from its resource, which is then used for providing the service in the service request.Type: ApplicationFiled: February 4, 2004Publication date: November 4, 2004Applicant: Catena Networks, Inc.Inventors: Tim Jenkins, Sejal Patel
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Publication number: 20040204173Abstract: A circuit controls the low frequency load currents drawn by components of telecommunications systems. The circuit includes a power converter, a first sense circuit, a second sense circuit, a comparator, and a power converter control circuit. The power converter control circuit controls the power converter's duty cycle in accordance with the input signal compared to a reference. In this manner, the low frequency load currents may be easily and economically controlled.Type: ApplicationFiled: October 3, 2002Publication date: October 14, 2004Applicants: Catena Networks, Inc., Potentia Telecom Power Inc.Inventors: Yan-Fei Liu, Raymond Orr, Kai Xu
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Publication number: 20040149551Abstract: A system and a method selectively switch between two different voltage supplies supplying a common node. A first of the voltage supplies is coupled to the common node by a first switch and a second of the voltage supplies is coupled to the common node by a second switch. The switching device comprises: a feedback network comprising a high-pass filter for filtering a signal at the common node and outputting the filtered signal as a feedback signal; a timing controller coupled to at least one of the first and second voltages supplies for determining when to switch between said first and second power supplies; a ring switch controller for applying a first control signal to the first switch for selectively enabling and disabling the first switch in response to the timing controller and the feedback signal; and a battery switch controller for applying a second control signal to the second switch for selective enabling and disabling the second switch in response to the timing controller and the feedback signal.Type: ApplicationFiled: November 12, 2003Publication date: August 5, 2004Applicant: Catena Networks, Inc.Inventor: Steven Porter
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Patent number: 6760430Abstract: A system reduces power dissipation for a plurality of line driver circuits. The system comprises a power source for providing a voltage source for the plurality of line driver circuits and a voltage regulator coupled between the power source and the plurality of line driver circuits. The voltage regulator receives an output of the power source and provides a constant predefined voltage to an input of the plurality of line driver circuits. Having a constant predefined voltage input to the plurality of line driver circuits reduces their average power dissipation.Type: GrantFiled: August 16, 2002Date of Patent: July 6, 2004Assignee: Catena Networks, Inc.Inventors: Scott McGinn, Martin Bijman
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Patent number: 6741700Abstract: A current sense circuit for sensing a current in a subscriber loop comprising a transformer having a first and second winding coupled for sensing a differential current in a loop, a sense winding for producing a sense current in response to a magnetic flux induced in the transformer due to the differential current, an amplifier circuit for receiving the sense current and wherein the sense current is indicative of a signal on the loop, and the amplifier being configured such that a transformer introduces a low insertion loss at a frequency of operation of the loop.Type: GrantFiled: November 9, 2000Date of Patent: May 25, 2004Assignee: Catena Networks, Inc.Inventor: Jonathan Kwan
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Patent number: 6742155Abstract: A forward error correction system for reducing the transmission error in a data transmission is provided. The system comprises an encoder for encoding data, an interleaver for interleaving the encoded data to an output data stream and a first buffer for storing the interleaved data. A transmitter is operatively associated with the first buffer for transmitting the interleaved data. A deinterleaver receives and deinterleaves the transmitted interleaved data and a second buffer operatively coupled with the deinterleaver stores the deinterleaved data. A decoder operatively coupled with the second buffer decodes the deinterleaved data. The deinterleaved data is decoded without intermediate storage, reducing the storage requirements.Type: GrantFiled: March 21, 2001Date of Patent: May 25, 2004Assignee: Catena Networks, Inc.Inventor: Peter Bengough
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Publication number: 20040078629Abstract: In a communications network, a system and method for fault notification and correlation. The system includes a notification collector that serves as an intermediary for processing fault notifications. If the fault notification volume exceeds a defined threshold, such that in the prior art could involve dropped notifications, the notification collector processes the critical fault notifications. The notification collector may also assign a higher priority to processing the fault notifications than the faulty components do for generating the fault notifications. In this manner, the need for a fault correlation subsystem is reduced.Type: ApplicationFiled: February 24, 2003Publication date: April 22, 2004Applicant: Catena Networks, Inc.Inventors: Dhananjay Godse, Geoff Nichols, Louie Kwan
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Publication number: 20040059774Abstract: A telecommunication system (such as a switch) connects a plurality of subscriber lines to a telecommunications network, and includes a common element. The common element, including a data management agent, is provided for distributing data from a source location to a set of hardware entities, which are subtended from the common element. The data management agent includes a transfer agent, a buffer pool and a plurality of download agents. The transfer agent retrieves the data from the source location and stores it in the buffer pool. The download agents retrieve the data from the buffer pool and transmit the retrieved data to a corresponding hardware entity. Thus, the efficiency for transferring data from the source location to the hardware entities is improved.Type: ApplicationFiled: July 8, 2003Publication date: March 25, 2004Applicant: Catena Networks, Inc.Inventors: Brian MacIsaac, Greg Lehman
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Publication number: 20040042509Abstract: An access device enables dynamic migration of telecommunications subscribers between multiple transport networks and call services providers. The access device stores access patterns that associate a subscriber with a call server and define trigger events. The access device monitors the trigger events. The access device associates the subscriber with a different call server in accordance with the trigger events and the access patterns. The trigger events can be dynamic or static, can be on a line-by-line or call-by-call basis, and can be selected by a user or implemented by an operator. In this manner, the access device allows graceful migration of voice services from a legacy network to a next-generation packet network with lower capital and ownership costs.Type: ApplicationFiled: May 30, 2003Publication date: March 4, 2004Applicant: Catena Networks, Inc.Inventors: Jean-Francois Gallant, John Donak
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Publication number: 20040028051Abstract: Apparatus implements combined packetized time-division multiplexed (TDM) streams and TDM cross connect functions. The apparatus includes an input buffer, a reassembly state machine, a frame buffer, and a segmentation state machine. The frame buffer includes multiple bins for storing cell data. The segmentation state machine retrieves information from the bins as associated with each DS0 and assembles output cells for transmitting output DS0s. The cells may be in asynchronous transfer mode (ATM) format, allowing a single ATM backplane to be used for voice signals, data signals, and combined voice/data signals. Various types of ATM cell formats are supported.Type: ApplicationFiled: June 2, 2003Publication date: February 12, 2004Applicant: Catena Networks, Inc.Inventors: Reza Etemadi, Mark Feeley, Michael Gazier, Mike Magnusson, Ken Neudorf
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Publication number: 20040028053Abstract: A direct memory access (DMA) circuit reduces the number of processor cycles involved in transmitting and receiving asynchronous transfer mode (ATM) cells. The circuit includes a read sequencer, a write sequencer, an ATM control block, a processor interface block, and a DMA arbitration and control block. The DMA arbitration and control block arbitrates between data transmissions on various subchannels. The ATM control block provides ATM functionality to the DMA circuit. The circuit may also respond to a trigger signal and may generate an interrupt signal. In this manner, the processing involved for DMA of ATM cells is improved.Type: ApplicationFiled: June 3, 2003Publication date: February 12, 2004Applicant: Catena Networks, Inc.Inventor: Ian Mes
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Publication number: 20040022276Abstract: Apparatus and method that increases bandwidth and reliability of digital subscriber line (DSL) connections. The system involves provisioning multiple DSL lines, splitting traffic into cells, transmitting the cells independently of each other, and reassembling the cells at the destination. Sequence numbers may be used when reassembling the cells. Virtual circuits (VCs) may be constructed across the DSL lines. Accordingly, a failure in one DSL line merely reduces the bandwidth without disruption to the customer. In this manner, the customer can be inexpensively provided with increased bandwidth and reliability.Type: ApplicationFiled: May 15, 2003Publication date: February 5, 2004Applicant: Catena Networks, Inc.Inventors: Michael Gazier, Morteza Ghodrat
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Publication number: 20040024976Abstract: System and method for reducing access latency to a shared program memory. The program memory is shared by more than one processor. The system includes fetch buffers (one per processor), prefetch buffers (one per processor), program fetch logic units (one per processor), and an arbiter. Each fetch buffer stores local instructions that are local to an instruction being used by an associated processor. Each prefetch buffer stores subsequent instructions that are subsequent to the local instructions stored in an associated fetch buffer. Each program fetch logic unit determines from where to fetch a next instruction required by the associated processor. The arbiter arbitrates between instruction fetch requests received for the fetch buffers and the prefetch buffers from the various processors. The arbiter determines which of the instruction fetch requests will next gain access to the program memory.Type: ApplicationFiled: March 25, 2003Publication date: February 5, 2004Applicant: Catena Networks, Inc.Inventor: Ian Mes
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Publication number: 20040006645Abstract: A combined wide area network (WAN) port/synchronization unit that receives inputs including data and timing information and that synchronizes the data for transmission. The unit includes the following components. A network interface receives the input and removes data and primary timing information from the input. A data-path function processes the data. A reference selection unit receives timing information from the network interface as well as timing information from a secondary combined WAN port/synchronization unit. A synchronization control unit selects the most reliable timing information from the plurality of timing information inputs to the reference selection unit. A multiplexor multiplexes the timing information with the processed data across a link.Type: ApplicationFiled: January 31, 2003Publication date: January 8, 2004Applicant: Catena Networks, Inc.Inventors: Michael Dziawa, Michael Gazier
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Publication number: 20040004936Abstract: A circuit and method is provided for reducing the effect of having potentially different sizes for an Inverse Discrete Fourier Transform (IDFT) at a transmitter and a Discrete Fourier Transform (DFT) at a receiver in a telecommunications system without requiring a change in the DFT's size. The method includes following steps. The first step includes determining whether the IDFT size is greater than, equal to, or less than the DFT size. The second step includes selecting a target impulse response length from a predefined set of impulse response lengths in accordance with a result the previous step. The third step includes training an equalizer at the receiver to the target impulse response length. The circuit comprises hardware and software for implementing the method.Type: ApplicationFiled: March 10, 2003Publication date: January 8, 2004Applicant: Catena Networks, Inc.Inventors: Alberto Ginesi, Song Zhang, Andrew Deczky, Duncan Baird, Christian Bourget
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Publication number: 20030235217Abstract: A system improves reconstruction of real-time data in a packetized network. The system includes the following elements. A play-out buffer receives packets from the network. A playback element, coupled with the play-out buffer, retrieves packets from the play-out buffer and outputs data for the reconstruction of real-time data. A time adjuster alters the rate at which the data is output in accordance with the availability of the packets.Type: ApplicationFiled: November 27, 2002Publication date: December 25, 2003Applicant: Catena Networks, Inc.Inventor: Eric Verreault
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Patent number: D486454Type: GrantFiled: October 19, 2001Date of Patent: February 10, 2004Assignee: Catena Networks, Inc.Inventors: Dyna Vink-Ellis, Adrianus Van Gaal