Abstract: A direct-execution microprogrammable microprocessor system uses an emulatory microprogrammable microprocessor for direct execution of microinstructions in main memory through a microinstruction port. A microinstruction cache with a microinstruction address extension unit serving to communicate microinstructions from the main memory to the microprogrammable microprocessor. Virtual main memory accesses occur through a system multiplexer. A virtual address extension unit and a virtual address bus provide extension and redefinition of the main memory address space of the microprogrammable microprocessor. The system also uses a context switching stack cache and an expanded address translation cache with the microprogrammable microprocessor having a reduced and redefined microinstruction set with a variable microinstruction cycle.
Type:
Grant
Filed:
March 11, 1985
Date of Patent:
August 2, 1988
Assignee:
Celerity Computing
Inventors:
Andrew J. McCrocklin, Nicholas E. Aneshansley, Patricia Shanahan, James J. Whelan, Jeffrey P. Anderson, James E. Kocol, Gary L. Riddle