Abstract: A power supply creates a voltage difference between high and low power supply rails. The power supply has a voltage signal source, a capacitive coupling element, energy storage element 12, first and second rectifying diodes, a regulator, and bypass means for selectively decreasing the impedance between the voltage signal source and the low power supply rail or increasing the load presented to the voltage signal source. The capacitive coupling element is connected to the voltage signal source. Energy storage element 12 stores energy between the high and low power supply rails. The first rectifying diode is positioned between the capacitive coupling element and energy storage element 12. It is coupled to the voltage signal source through the capacitive coupling element and arranged to favor current flow toward energy storage element 12 from the capacitive coupling element. The second rectifying diode is positioned between the capacitive coupling element and the low power supply rail.

Abstract: A system for conveying a radio frequency (RF) signal from a base station to a detached integrated circuit (IC) has an intermediate resonant circuit and an IC. The intermediate resonant circuit is configured to resonate in response to the RF signal from the base station, reproducing the RF signal. The IC has an integral resonant circuit configured to resonate in response to the reproduced RF signal. The IC and the intermediate resonant circuit are affixed proximate each other. Both are separate from the base station and each other. Either or both of the intermediate resonant circuit and the integral resonant circuit may contact a high magnetic permeability layer. The intermediate resonant circuit may be formed of conductive ink.

Abstract: A rectifier generates a rectified output and a dc power output. The rectifier has an antenna element, a tuning capacitor, a coupling capacitor, first and second rectifying diodes, and a storage capacitor. The antenna element and the tuning capacitor are coupled in parallel and grounded at one terminal. The first rectifying diode is grounded at its anode terminal and the storage capacitor is grounded at one terminal. The coupling capacitor is coupled between the ungrounded terminal of the antenna element and the cathode terminal of the first rectifying diode. The anode terminal of the second rectifying diode is coupled to the cathode terminal of the first rectifying diode. The cathode terminal of the second rectifying diode is coupled to the ungrounded terminal of the storage capacitor. The rectified output is generated between the rectifying diodes. The dc power output is generated between the second rectifying diode and the storage capacitor.

Abstract: A ferroelectric layer within an array of ferroelectric FETs is encapsulated between a bottom barrier dielectric layer and a top barrier dielectric layer extending beyond the ferroelectric layer. The ferroelectric FETs are formed on first conductivity type silicon, each having two second conductivity type silicon regions within the first conductivity type silicon separated by some distance. The two second conductivity type silicon regions forming a source and a drain with a channel region therebetween. A silicon dioxide layer is formed on the channel region, a bottom barrier dielectric layer is formed on the silicon dioxide layer, a ferroelectric layer is formed on the bottom barrier dielectric layer, a top barrier dielectric layer is formed on the ferroelectric layer, and an electrode layer is formed on the ferroelectric layer.