Abstract: A logic JK flip-flop structure is disclosed which may have a dynamic, semi-dynamic or static behavior as far as the clock signal is concerned. The structure of the invention is particularly simple in design and has a minimum number of transistors although it is insensitive to parasitic noise which might affect the control variables J,K, and it does not involve any logical hazards. The basic structure of the invention is schematically represented in FIG. 1.

Abstract: An electronic watch control device for manual actuation is disclosed. It comprises a capacitive sensor including a conductive layer on the inner surface of the watch-glass, which is actuated by placing a finger-tip on the outer side of the watch-glass. The sensor is part of a capacitive voltage divider to which a high frequency voltage is applied. Synchroneous detection means are arranged for detecting the high-frequency voltage drop across the sensor in synchronism with the high-frequency. Comparison means are provided for comparing the value of the said voltage drop to a reference voltage and producing a control signal depending on the condition of the sensor.

Abstract: An electrically reprogrammable non-volatile memory device is disclosed which includes complementary MOS transistors provided with a polycrystalline silicon floating gate electrode in a common n.sup.- -type substrate. The device comprises three main parts. The first part, which is used for writing, comprises a p-channel writing transistor, a p-channel control transistor and a resistance element. The second part, which comprises a second gate electrode capacitance coupled with the floating gate, is used for erasing. The third part is used for performing information read-out and consists of a p-channel transistor the gate of which forms a portion of the floating gate and the drain of which is connected to a read-out terminal and to the terminal of a loading element having its other terminal connected to a negative supply potential.

Abstract: A logic D flip-flop structure is disclosed which may have a dynamic, semi-dynamic or static behaviour as far as the clock signal is concerned. The structure of the invention is particularly simple in design and has a minimum number of transistors although it is insensitive to parasitic noise which might affect the control variable D and it does not involve any logical hazards. The basic structure of the invention is schematically represented in FIG. 1.

Abstract: The invention relates to logic CMOS transistor circuits formed by at least one gate circuit, each gate circuit comprising a pair of CMOS transistor groups connected in series between the terminals of a power supply. The conductive state of both groups of transistors defines the potential of a common connection point or output node. A power dissipating means of relatively high resistance is coupled in parallel with at least a part of at least one of the said transistor groups, at least during a time interval in which both groups are in a non conductive state. This results in a quasi static behavior of the circuits according to the invention although the basic structure of the same is that of dynamic circuits.

Abstract: The invention relates to piezoelectric resonators, and more particularly to piezoelectric resonators comprising a DT- or CT-cut quartz plate vibrating torsionally about its longitudinal axis which is the electrical axis X of the quartz crystal. The width of the plate b, extending along the Z'-axis, and its thickness h extending along the Y'-axis are linked by the relation1<b/h<10In proportion to its size, the resonator has a low resonance frequency, the temperature coefficient of the first order of which is nil and the temperature coefficient of the second order of which is very low.

Abstract: An electric wrist watch including a case containing a timekeeping module, an electrical storage device, and a display device. The case also includes a thermoelectric generator in contact with two heat exchangers. The two heat exchangers are arranged such that they are at least temporarily at different temperatures, with one of the heat exchangers being in contact with the surrounding air.

Abstract: An active circuit is disclosed including an integrated circuit having at least one amplification stage comprising an FET. At least one negative feedback transistor is provided of the same conduction type as the amplifying transistor, with the drain-to-source path of the negative feedback transistor coupled in series between the drain and gate of the amplifying transistor. At least one biasing transistor of the same conduction type as the amplifying transistor are provided to bias the gate of the negative feedback transistor. The drain of the at least one biasing transistor is connected to a current source furnishing a current having a given ratio to the power supply current of the amplifying transistor. This circuit permits precise control of the small-signal resistance of the feedback transistor.

Abstract: A binary frequency divider circuit with insulated gate field effect transistors (MOST) powered by a constant voltage source is derived from a known static circuit by eliminating transistors that do not take part in switching, which allows nodes of the circuit to float. Certain transistors, which are eliminated in known dynamic circuits, are retained so that the nodes float for only one value of an input variable, but not for the other.

Abstract: A piezoelectric resonator, particularly for electronic wrist watches, comprises an elongated piezoelectric crystal rod that oscillates in length-extension. Opposite faces of the rod are partially metallized; and short wires are secured tangentially to these metallized surfaces midway of the length of the rod. The wires extend perpendicular to the length of the rod and are secured at their other ends to metallized opposite surfaces of an elongated ceramic support which is parallel to and of about the same size and shape as the rod. The support also has metallized end faces which are secured to the inner ends of support wires that pass through a casing in sealed relationship and mount the support and rod in spaced relation from the casing.

Abstract: A device for transmission of information by pulse code frequency shift modulation. The device incorporates a phase-locked superheterodyne receiver including a single voltage controlled oscillator, and a demodulator including a phase comparator and a phase shifter. The intermediate frequency is equal to one half the input signal frequency shift. The comparator compares the phases of the intermediate frequency signal and of a signal of the same frequency derived from the voltage controlled oscillator to provide a message output.

Abstract: A multifunctional wrist watch combining the functions of time-indication with other functions, for example a calculator. The watch has a glass in which pick-ups are provided for detecting the passage of a finger of a user over the surface of the glass and recognition circuits for converting the trace detected into a logic signal for processing by a calculator circuit provided in the watch case. The output of the calculator is then displayed by the electro-optical display on the watch. The detection and recognition facility may also be utilized for correction of the date and time settings of the watch.

Abstract: An integrated circuit comprises complementary FET having channels extending on the surface of a substrate and on the surface of a well in the substrate and gates formed in a layer of polycrystalline silicon insulated from the substrate and from each said well. A floating diode, i.e. connected neither to the substrate, nor to a well, is formed simultaneously with the FET by depositing and selectively etching a first doped oxide to cover a first region of the polycrystalline silicon, depositing an oppositely doped oxide over the remainder using the first oxide as mask, and oppositely doping the two regions of polycrystalline silicon by heat treatment. Alternatively, the second region can be doped by treatment in a gaseous phase or by ionic implantation, in either case using the first oxide as mask.

Abstract: A quartz crystal thermometer in which a standard frequency is generated by a first oscillator circuit incorporating a quartz crystal element and in which a frequency which varies with temperature is generated by a second circuit incorporating the same quartz crystal element. Two electrode pairs are provided on the single quartz crystal element in order to excite two different modes of vibration of the quartz crystal element, with the metallization being on only one or on both of the major faces of the quartz crystal element. In accordance with preferred embodiments, an AT- or a BT-cut quartz crystal plate is utilized. The ratio of the said two frequencies provides an accurate measure of the temperature.

Abstract: An electro-luminescent diode having a luminous surface which is defined by a thinned portion comprising zones with emitting junctions, the zones occupying only a portion of the luminous surface. The composition of the thinned portion allows multiple reflection of light to occur and enables light generated in the diode and totally internally reflected to be reflected back from a diffusing reflector to emerge and increase the intensity of light efficiency of the diode.

Abstract: An autonomous electric watch comprises a receiver for picking up a magnetic or acoustic coded regulation signal delivered by a telephone set, and a control circuit automatically controlling memory circuits of the watch to regulate the frequency and/or set the time displayed in response to reception of such a signal. The regulation signal is provided by a signal generator connected to an automatic telephone reply apparatus that can be called from any subscriber telephone set, and may be combined with a pre-recorded spoken message giving instructions to the caller.

Abstract: A frequency generator comprises a quartz crystal controlled oscillator subjected to at least one variable physical parameter such as temperature and has an arrangement for calibrating the frequency with respect to a standard signal with simultaneous compensation for variations of the physical parameter(s). This arrangement comprises a first set of selectable memories storing values to control the division ratio in a dividing chain. These memories are inscribed in a learning period for a few values of the physical parameter(s); simultaneously, digital values supplied by at least one probe, each value corresponding to a range of values of the parameter, are stored in a second set of memories associated with the probe(s).

Abstract: CMOS oscillator in which the oscillator circuit comprises a first MOS transistor connected by its source to a first terminal of a voltage supply and biased by the current provided by a second MOS transistor of opposed type which is a part of the same integrated circuit. At least a third MOS transistor (T.sub.6, T.sub.8, T.sub.12) of the same type as the second and which is a part of the same integrated circuit is provided, the sources and gates of the second and third transistors being respectively connected together and respectively to the second terminal of the voltage supply and to a point (P) at a potential such that the mean drain current of the first transistor will be maintained at a value just higher than the value at which oscillation starts.

Abstract: Disclosed is a light emitting diode display system powered by ambient light. This solid state electronic display device comprises an ambient irradiated photovoltaic battery energizing through an electronic adapter circuit light emitting diodes selectively chosen to display the desired information. The adapter circuit transforms the electrical power continuously supplied by the photovoltaic battery into energy pulses which are periodically applied to the display. In addition, the adapter circuit automatically adjusts the display brightness in accordance with the ambient illumination level. At low and zero light levels, the electronic display device maintains a visible display by deriving power from a secondary energy source.

Abstract: A device for providing an electro-optical display of time comprises an electronic timekeeper fed by a voltage source and including a time base and a frequency divider. An electro-optical display is formed of groups of electro-chromic cells each able to take two different visual aspects. The cells are controlled by a code converter supplying state variables corresponding to the desired aspects of the cells to provide a display of time. One aspect of the cells corresponds to a stable state, the other aspect to a quasi-stable state which in order to be maintained, requires very low or zero power. Transition of a cell from one state to another requires precisely determined amounts of energy. A change detector supplies to a selector, data to actuate the operations of inscription and erasure of the display cells.