Abstract: An interface interposed between a PCM data terminal and a processor comprises a bus accessor dialoguing with the processor, input and output circuitry coupled to the terminal, and intervening logic circuits and data stores designed to supply the processor in a time-division mode with preprocessed messages received or to be transmitted over a multiplicity of channels. The interface is operable according to dialogue procedures of HDLC type such as those corresponding to CCITT recommendations X25, X75 and N. 7, with switchover from one protocol to another.

Abstract: An SS/TDMA communication system comprises a multiplicity of ground stations, including one master station and a number of traffic stations without control function, exchanging digitized voice or other message signals via a relay station aboard a satellite. Each ground station comprises base-band equipment including a transmitting section, a receiving section and a control unit. The control unit of the master station generates outgoing timing signals and processes incoming timing signals for synchronizing the operations of its own equipment and that of the traffic stations with the operation of a switching unit of the satellite-borne relay station; this control unit also emits routing instructions for that switching unit.

Abstract: The system allows the implementation of packet-switched synchronous speech communications in the network without requiring any centralized device synchronizing all the network stations. To obtain that, the active periods of each station are subdivided into frames each having a duration equal to the time elapsing between the generation to two subsequent speech packets relating to the same communication; once a station has accessed the line for the speech communications, these communications are allotted time slots which are maintained for the whole communication duration. The slots not allotted to speech communications are allotted to data transmission. The access to the line for a speech communication is obtained by the same contention techniques used also for data transmission.

Abstract: A drum for winding up filamentary material, such as optical fibers, has a generally cylindrical unitary flangeless hollow body of airtight and somewhat resilient polymeric material inflated under a fractional gauge pressure through a valve in one of its end walls. A bore in each end wall, centered on the cylinder axis, enables the drum to be coupled with a driving mechanism.

Abstract: An apparatus for the recovery of an amplitude-modulated and phase-modulated signal wherein the signal is multiplied by two correction and adjustment signals in phase-quadrature in a pair of multipliers connected in low-pass filters to the sample and decision circuit. The output of the latter is an error signal which represents the phase error of the recovered carrier obtained by the comparison made between the baseband components of the demodulated signal and suitable decision thresholds at a decision instant estimating transmitted digital symbols. A logic circuit is connected to the output of the sample and decision circuit and delivers its output to a pulse generator whose correction train of pulses is filtered before being applied to a voltage-controlled oscillator whose output is applied directly to one of the multipliers and through a quadrature-phase shifter to the other.

Abstract: At a receiver for binary or other digital message signals, the incoming signals are fed in parallel to a first decision network with a relatively low threshold and a second decision network with a relatively high threshold, the latter being adjustable. The output of the first decision network is delivered to a utilization circuit and in parallel therewith, together with the output of the second decision network, to a comparator emitting a pseudo-error pulse in response to any divergence in the two outputs. A counter stepped by the pseudo-error pulses, upon reaching a predetermined count, triggers a pulse generator producing a binary voltage v.sub.i whose mean value v.sub.u, obtained by integration, is a measure of signal degradation. Under the control of this mean value v.sub.u the threshold of the second decision network is automatically varied in the opposite sense to maintain a substantially constant pseudo-error rate.

Abstract: A processor in a telephone exchange, monitoring the activity of r subscriber lines having each an incoming and an outgoing channel allocated to them, emits during respective halves of any 8-bit time slot in a 32-time-slot frame a pair of m-bit addresses x, y for each subscriber initiating or engaged in a conversation, these addresses respectively identifying an outgoing channel of a first (e.g. calling) subscriber and an incoming channel of a second (e.g. called) subscriber to be placed once per frame in communication with each other by a PCM switching network. The addresses of incoming and outgoing channels issuing from the processor during each time slot are separated in a distributor, the addresses y being inscribed in stages of a storage network respectively assigned to the 32.sup.. 32.sup.. n channels identified by addresses x. The storage network consists of n random-access memories, one for each of n channel groups, divided into 32 sections of 32 stages each for as many 32-channel families.

Abstract: Selectively seizable operating units (e.g. switches, lines or coders), forming part of different groups A, B etc. of identical units, are monitored to detect any change of state in a unit of, say, group A followed within a predetermined test period by a change of state of a unit of, say, group B. From the occurrence of the second transition, and in the absence of a switchover of any other unit of either group during the test period, an operative association is recognized between the two units in which these transitions were consecutively detected. The monitoring of all the units under surveillance is carried out in time-division sequence by cyclically scanned sensors individually assigned to them.

Abstract: A switching station for a telecommunication system, operating with pulse-code modulation, serves a multiplicity of incoming and outgoing PCM channels each consisting of a succession of 8-bit words cyclically interleaved with the words of 31 other channels in an assigned time slot of a 32-channel frame, 32 such frames being received and transmitted over as many signal paths forming a frame group. There are n incoming frame groups and n outgoing frame groups with synchronized bit phases in all the spatially separated channels thereof. A central processor controls the concurrent storage of all the incoming bits of a given phase in n pairs of 16-section input memories, each memory section consisting of 8 stages for the bits of a respective word from an incoming channel on a receiving signal path.

Abstract: For the selective energization of combinations of up to m data outputs of a data concentrator with n data inputs (n > m), the concentrator is provided with n control inputs energizable in various patterns. The concentrator comprises a logic network with an enabling section and a performing section, each in the form of a truncated orthogonal matrix with m rows and n columns of gating circuits. In each matrix the number of gating circuits decreases from n in the first row to (n-m+1) in the last row.

Abstract: A receiving station for analog and digital messages, transmitted via a radio link, includes a sensor for a pilot frequency f.sub.p and a detector for a noise frequency f.sub.n both lying within the frequency spectrum of digital signals. A simulator at the receiver generates the noise frequency f.sub.n during high-speed digital transmission in response to an incoming frequency f.sub.1 lying outside that spectrum; this simulator may also include a local source of pilot frequency f.sub.p or an equivalent signal generator which actuates the corresponding sensor in the presence of a synchronizing signal accompanying the digital message.

Abstract: Incoming data pulses from a transmission channel are differentially combined with weighted data pulses from preceding cycles to form an updating signal fed in parallel to a multiplicity of weighting circuits for digital multiplication with respective coefficients K.sub.1 - K.sub.N, the output signals from these weighting circuits being synthesized in staggered relationship to form a composite signal fed to a quantizing decoder. The weighting coefficients K.sub.1 - K.sub.N are continuously modified under the control of an error signal derived from a locally generated reference code during an acquisition phase and from the decoder output during an operating phase.

Abstract: A dynamic memory UR containing n different message words, carried on as many endless signal tracks, works into a set of m temporal voice channels through a TDM switching matrix RC enabling any channel to be periodically connected, in its recurrent time slot, to a selected signal track. Messages synthesized from up to k words may provide information on the charge of a toll call, for example, as determined in a processor of a central office, the processor translating that information into data codes identifying corresponding signal tracks in response to a request from an inquiring subscriber. A first static memory M.sub.