Patents Assigned to Ceratech Corporation
  • Patent number: 11639314
    Abstract: A porous fired granulated body is formed by consolidating numerous alumina particles to each other while letting mainly interconnected pores remain in network form across an entire cross section of a granulated body particle. The pores have an inner diameter controlled by a droplet diameter of a pore forming agent and have numerous precipitated alumina crystals formed on inner surfaces thereof. Manufacture is performed by spraying the pore forming agent (emulsion) onto a raw material to form a coating layer of the pore forming agent on a surface of the raw material particle and controlling the inner diameter of the pores. A porous fired granulated body of alumina having a high specific surface area and having higher strength for the same specific surface area can thus be provided by a simple manufacturing method.
    Type: Grant
    Filed: February 17, 2020
    Date of Patent: May 2, 2023
    Assignee: Itochu Ceratech Corporation
    Inventors: Akira Takahashi, Junya Shimosato, Takahiko Nakamura, Noriyuki Tamura
  • Patent number: 11236904
    Abstract: Provided are: a useful bed medium for a fluidized bed with good fluidity, the bed medium being usable in a fluidized bed furnace using biomass material and coal material as fuel; and a useful bed medium for a fluidized bed with good durability, the bed medium not easily forming an agglomerate of its particles, and being resistant to collapsing. The bed medium for a fluidized bed in a fluidized bed furnace for combusting or gasifying the fuel is formed of artificially-produced spherical refractory particles containing not less than 40% by weight of Al2O3 and not more than 60% by weight of SiO2 and having an apparent porosity of not more than 5%, and a ratio by weight of agglomerated particles in the bed medium is not more than 20% after three heat treatment tests on the bed medium at 900° C. for 2 hours under coexistence with the fuel.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: February 1, 2022
    Assignee: Itochu Ceratech Corporation
    Inventors: Hiroshi Makino, Jun Sakamoto, Takayuki Kameda, Reiku Aoyama, Shunichi Sato, Yoji Okumura
  • Publication number: 20200217499
    Abstract: Provided are: a useful bed medium for a fluidized bed with good fluidity, the bed medium being usable in a fluidized bed furnace using biomass material and coal material as fuel; and a useful bed medium for a fluidized bed with good durability, the bed medium not easily forming an agglomerate of its particles, and being resistant to collapsing. The bed medium for a fluidized bed in a fluidized bed furnace for combusting or gasifying the fuel is formed of artificially-produced spherical refractory particles containing not less than 40% by weight of Al2O3 and not more than 60% by weight of SiO2 and having an apparent porosity of not more than 5%, and a ratio by weight of agglomerated particles in the bed medium is not more than 20% after three heat treatment tests on the bed medium at 900° C. for 2 hours under coexistence with the fuel.
    Type: Application
    Filed: March 19, 2020
    Publication date: July 9, 2020
    Applicant: ITOCHU CERATECH CORPORATION
    Inventors: Hiroshi Makino, Jun Sakamoto, Takayuki Kameda, Reiku Aoyama, Shunichi Sato, Yoji Okumura
  • Patent number: 10456829
    Abstract: Providing a method of modifying refractory particles used to produce a casting mold by using a furan resin as a binder, so as to effectively improve a strength of the casting mold and to reduce a required amount of the binder. An artificial aggregate which is artificially produced and which has an apparent porosity of not more than 5% is used as the refractory particles, and the artificial aggregate is subjected to a heat treatment at a temperature of 400-1500° C. for not shorter than one hour in a heating atmosphere having an oxygen concentration of not higher than 15%.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: October 29, 2019
    Assignee: Itochu Ceratech Corporation
    Inventors: Hiroshi Makino, Masami Ono
  • Patent number: 7835135
    Abstract: There is a provided a magnetic and dielectric composite electronic device, comprising: a first region with a plurality of magnetic material sheets being layered; a second region with a plurality of dielectric material sheets being layered; and a third region as a middle layer interposed between the first region and the second region, including a Zn—Ti based material to prevent diffusion of the materials during co-firing of the first region and the second region, and the first region, the second region and the third region are integrally formed in a single body. In accordance with the present invention, the low pass filter including the function of the varistor is realized to obtain the EMI function and the ESD control effect.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: November 16, 2010
    Assignee: Ceratech Corporation
    Inventors: Kyoung Hwan Cho, Jung Ik Song, Jeong In Choi
  • Publication number: 20090097219
    Abstract: There is a provided a magnetic and dielectric composite electronic device, comprising: a first region with a plurality of magnetic material sheets being layered; a second region with a plurality of dielectric material sheets being layered; and a third region as a middle layer interposed between the first region and the second region, including a Zn—Ti based material to prevent diffusion of the materials during co-firing of the first region and the second region, and the first region, the second region and the third region are integrally formed in a single body. In accordance with the present invention, the low pass filter including the function of the varistor is realized to obtain the EMI function and the ESD control effect.
    Type: Application
    Filed: February 29, 2008
    Publication date: April 16, 2009
    Applicant: CERATECH CORPORATION
    Inventors: Kyoung Hwan Cho, Jung Ik Song, Jeong In Choi
  • Patent number: 7069639
    Abstract: A method of fabricating a chip type power inductor includes the steps of: preparing green sheets: forming cutting lines on a magnetic layer green sheet and a non-magnetic layer green sheet; forming via holes on the non-magnetic layer green sheet where the cutting lines are formed, and forming an electrode pattern at an upper surface of the non-magnetic layer green sheet; stacking a plurality of layers by constituting the magnetic layer and the non-magnetic layer where via holes and electrode patterns are formed as one unit in a state that a non-magnetic layer where cutting lines and electrode patterns are not formed is inserted; stacking a cover layer composed of a magnetic layer at upper and lower surfaces of the stacked layers; firing the stacked body; and forming external electrodes at an outer surface of the fired stack body.
    Type: Grant
    Filed: November 25, 2003
    Date of Patent: July 4, 2006
    Assignee: Ceratech Corporation
    Inventors: Myoung-Hui Choi, Soon-Gyu Hong, Sang-Eun Jang
  • Patent number: 6918173
    Abstract: In a method for fabricating a surface mountable chip inductor, a spiral coil pattern is formed on a surface of a cylindrical body fabricated by mixing ferrite or ceramic powder with thermoplastic organic binder, the cylindrical body is transformed into a square-shaped body by being inserted into a square-shaped mold and pressure being applied at a certain temperature. An electric characteristic lowering problem can be prevented by forming the coil on the cylindrical body, and transforming the cylindrical body into a square-shaped body to improve surface mounting.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: July 19, 2005
    Assignee: Ceratech Corporation
    Inventor: Byeung-Joon Ahn
  • Patent number: 6917274
    Abstract: A stacked coil device comprising: an inner electrode layer formed of at least two parts and having a non-magnetic electrode region and an inner magnetic region formed as one layer, the non-magnetic electrode region being provided with an opening at a center thereof and provided with an electrode pattern on at least one surface of an upper surface and a lower surface thereof and the inner magnetic region positioned at the center opening and a lateral surface of the non-magnetic electrode region; a cover layer in contact with both surfaces of the inner electrode layer; and an external electrode terminal electrically connected to the electrode pattern.
    Type: Grant
    Filed: October 1, 2003
    Date of Patent: July 12, 2005
    Assignee: Ceratech Corporation
    Inventors: Soon-Gyu Hong, Myoung-Hui Choi, Sang-Eun Jang
  • Publication number: 20040108934
    Abstract: A chip type power inductor comprising: a stack body where a magnetic substance which forms a magnetic core stacked with a plurality of layers and non-magnetic layers inserted to inside of the magnetic substance which forms a magnetic core are formed as one unit; coil patterns formed on either upper surfaces or lower surfaces of the plurality of layers of the magnetic substance which forms a magnetic core; and via holes formed at the plurality of layers constituting the magnetic substance which forms a magnetic core in order to electrically connect the coil patterns.
    Type: Application
    Filed: November 25, 2003
    Publication date: June 10, 2004
    Applicant: Ceratech Corporation
    Inventors: Myoung-Hui Choi, Soon-Gyu Hong, Sang-Eun Jang
  • Publication number: 20040061587
    Abstract: A stacked coil device comprising: an inner electrode layer formed of at least two layers and having a non-magnetic electrode layer and an inner magnetic layer as one unit, the non-magnetic electrode layer provided with an opening at a center thereof and provided with an electrode pattern on at least one surface of an upper surface and a lower surface thereof and the inner magnetic layer positioned at the center opening and a lateral surface of the non-magnetic electrode layer; a cover layer in contact with both surfaces of the inner electrode layer; and an external electrode terminal partially and electrically connected to the electrode pattern.
    Type: Application
    Filed: October 1, 2003
    Publication date: April 1, 2004
    Applicant: Ceratech Corporation
    Inventors: Soon-Gyu Hong, Myoung-Hui Choi, Sang-Eun Jang
  • Publication number: 20030076217
    Abstract: A polymeric positive temperature coefficient (PTC) thermistor having a particular crystalline structure to allow the resistivity of the crystalline polymer to return to its approximate original level after an overcurrent is applied thereto. Subjecting a polymer to cross-linking, heating the cross-linked polymer at a temperature of a melting point of the polymer or above the melting point of the polymer, and re-crystallizing the heated polymer forms the particular crystalline structure. By doing so, the cross-linking rate of the crystalline polymer is maximized, and the size of the crystals in the crystalline polymer is minimized. Also, the polymer layer having electrodes thereon are cut into units of a desired size before setting and/or hardening thereof, to minimize to formation of irregularities such as stress fractures, microscopic cracks, and the like.
    Type: Application
    Filed: January 10, 2002
    Publication date: April 24, 2003
    Applicant: Ceratech Corporation
    Inventors: Kyoung-Ri Park, Byoung-Su Jin, Sang-Joon Sung, Yu-Seok Kim, Seoung-Jung Ryu
  • Publication number: 20020013994
    Abstract: In a method for fabricating a surface mountable chip inductor, a spiral coil pattern is formed on a surface of a cylindrical body fabricated by mixing ferrite or ceramic powder with thermoplastic organic binder, the cylindrical body is transformed into a square-shaped body by being inserted into a square-shaped mold and being applied pressure at a certain temperature. An electric characteristic lowering problem can be prevented by forming the coil on the cylindrical body, and transforming the cylindrical body into a square-shaped body is advantageous to surface mounting.
    Type: Application
    Filed: July 26, 2001
    Publication date: February 7, 2002
    Applicant: Ceratech Corporation
    Inventor: Byeung-Joon Ahn
  • Patent number: 6159768
    Abstract: An array type multi-chip device and a fabrication method therefor form a plurality of devices of the same kind or different kinds into a single chip. The array type multi-chip device includes: an array type sintered body in which a plurality of unit devices are arranged such that internal electrodes of each of the unit devices are exposed at opposite side surfaces of the array type sintered body; glass pastes formed at portions of the side surfaces of the array type sintered body between the internal electrodes of the adjacent unit devices; external electrodes of conductive paste formed to cover the internal electrodes at the surfaces of the sintered body between the adjacent glass pastes and overlapping the glass pastes; and nickel and solder platings formed on surfaces of the external electrodes.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: December 12, 2000
    Assignee: Ceratech Corporation
    Inventor: Byeung-Joon Ahn
  • Patent number: 6087923
    Abstract: A low capacitance chip varistor and a fabrication method thereof are described, which are capable of protecting the electronic elements of an electronic instrument from an external and internal surge and being well applicable to an electronic element which requires a low capacitance, and the low capacitance chip varistor includes at least one sheet support layer formed of a member having a low dielectric constant, a varistor layer including at least more than one varistor coating layer formed on the support layer, at least more than two internal electrode folded with a predetermined portion of the varistor layer to be connected with the varistor layer, one end of each of which is extended from a lateral surface of the support layer, and a pair of integrally formed external electrodes formed on a lateral surface of a varistor stack member integrally formed of the support layer, the varistor layer and the internal electrodes to be connected with one end portion of each internal electrode.
    Type: Grant
    Filed: March 18, 1998
    Date of Patent: July 11, 2000
    Assignee: Ceratech Corporation
    Inventors: Byeung Joon Ahn, Yong Joo Kim
  • Patent number: 5830566
    Abstract: A molded friction material for a damper is disclosed, which contains, as a part of a friction regulating material, porous fibrous particulates having an average particle size of 0.5 to 2 mm and a bulk density of 0.1 to 0.2 g/cm.sup.3 and comprising finely divided ceramic fibers or porous fibrous particulates having an average particle size of 0.1 to 5 mm and a bulk density of 0.2 to 2.0 g/cm.sup.3 and comprising finely divided ceramic fibers, a filler, and a binder. The friction material exhibits excellent performance basically required of a friction material, such as mechanical strength and damping characteristics, and hardly squeaks during damping.
    Type: Grant
    Filed: October 13, 1995
    Date of Patent: November 3, 1998
    Assignees: Nichias Corporation, Nichias Ceratech Corporation
    Inventors: Kohichi Kimura, Yoshihiko Goto, Nobuhiro Torii, Hiroshi Katagiri, Hideyuki Miyazawa, Yoshiyuki Motoyoshi