Abstract: An integrated circuit which contains a processor, and configurable logic with configuration memory such that the configurable logic can emulate a large memory array when the contents of the array are very sparse. This structure allows for fast access and a continuous updating capability while remaining internal to the chip. A methodology for recompressing the contents of the configurable logic while updating the configurable logic is also described.
Type:
Grant
Filed:
January 26, 1999
Date of Patent:
May 14, 2002
Assignee:
Chameleon Systems
Inventors:
Christopher E. Phillips, Dale Wong, Laurence H. Cooke