Abstract: Embodiments of the present application provide a manufacturing method of a semiconductor structure and a semiconductor structure. The manufacturing method includes: providing a base with an electrical contact layer therein; forming an insulating layer on the base, the insulating layer having a through hole penetrating the insulating layer, and the through hole exposing a surface of the electrical contact layer; forming a sidewall layer on a sidewall of the through hole; forming a first isolation layer, the first isolation layer covering a surface of the sidewall layer and an exposed surface of the insulating layer; removing the sidewall layer to form a gap between the first isolation layer and the insulating layer; and forming a conducting layer filling the through hole, the conducting layer being electrically connected to the electrical contact layer.

Abstract: A method for manufacturing a semiconductor structure includes: providing a substrate, a first mask and a second mask, etching the substrate by respectively using the first mask and the second mask, so as to form first grooves and second grooves on the substrate, wherein regions, in the substrate, where the first grooves and the second grooves are located form bit line grooves; and forming a conductive layer in each of the bit line grooves.

Abstract: A DRC test pattern generation method includes: receiving a DRC test pattern generation request, the DRC test pattern generation request carrying the number of correct patterns and the number of erroneous patterns; acquiring layout design rule information and corresponding layer configuration information, the layer configuration information including process layer configuration parameter information that is set according to a process type; parsing parameter information corresponding to each rule in the layout design rule information and the process layer configuration parameter information in the layer configuration information, and generating formatted parameter information corresponding to the each rule; and generating a corresponding number of correct patterns and a corresponding number of erroneous patterns corresponding to each rule according to the formatted parameter information.