Patents Assigned to Chartered Semiconductor Manufactuing Pte, Ltd.
  • Patent number: 5667629
    Abstract: An apparatus and method for determination of the endpoint for chemical mechanical polishing of a layer of dielectric material formed on an integrated circuit wafer. A first voltage is generated which is proportional to the current supplying electrical power to the electric motor driving the polishing mechanism. The current is proportional to the rate of removal of dielectric material by the polishing process. The integral over time of the first voltage, which is proportional to the amount of dielectric material removed, is generated by an integrator circuit. A comparator circuit compares the integral over time of the first voltage to a reference voltage. The reference voltage is proportional to the initial thickness of the dielectric material and is a function of the age of the polishing pad. When the integral over time of the first voltage is less than the reference voltage the polishing continues.
    Type: Grant
    Filed: June 21, 1996
    Date of Patent: September 16, 1997
    Assignee: Chartered Semiconductor Manufactuing Pte, Ltd.
    Inventors: Yang Pan, Jiazhen Zheng