Abstract: A JFET having a semiconductor substrate of a first doping type, an epitaxial layer of the first doping type located on the semiconductor substrate, a body region of a second doping type located in the epitaxial layer, a source region of the first doping type located in the epitaxial layer, a gate region of the second doping type located in the body region, and a shielding layer of the second doping type located in the epitaxial layer, wherein the semiconductor substrate is configured as a drain region, the shielding layer is in a conductive path formed between the source region and the drain region.

Abstract: A method having a negative output voltage at a negative output terminal of a charge pump tracking a positive output voltage at a positive output terminal of the charge pump. The charge pump comprises a plurality of switches and each of the plurality of switches has a serially coupled resistance. The method comprises selecting the serially coupled resistance for at least one of the plurality of switches to be different to each of the other respective serially coupled resistances associated to the other switches.

Abstract: A field effect transistor (“FET”), a termination structure and associated method for manufacturing. The FET has a plurality of active transistor cells and a termination structure. The termination structure for the FET includes a plurality of termination cells arranged substantially in parallel from an inner side toward an outer side of a termination area of the FET. Each of the termination cells comprises a termination trench lined with a termination insulation layer and filled with a termination conduction layer. The innermost termination cell is electrically coupled to gate regions of the active transistor cells while the rest of the termination cells are electrically floating.

Abstract: The embodiments of the present invention disclose a semiconductor device and a method for forming the semiconductor device. Wherein the semiconductor comprises: a first semiconductor layer, having a first conductivity type on a semiconductor substrate, a guard ring region, formed in the surface of the first semiconductor layer, having a second conductivity type; a Schottky diode metal contact, coupled to the first semiconductor layer, wherein the guard ring region is at periphery of the Schottky diode interface, and wherein the Schottky diode metal contact has no direct electrical connection with the guard ring region; and an electrical resistance module, coupled between the Schottky diode metal contact and the guard ring. Due to the ballasting effect from the electrical resistance module, the minority injection or the parasitic transistor action are alleviated. Thus, forward current capability is extended without introducing significant minority injection.