Abstract: A PCIe controller and a loopback path using the PCIe controller. The PCIe controller includes: a transport layer transmission module, a transport layer reception module, a memory access module, and a memory, wherein the transport layer transmission module includes a first loopback control module, the transport layer reception module includes a second loopback control module, and the first loopback control module is coupled to the second loopback control module; the memory access module is coupled to the transport layer transmission module and the transport layer reception module, and the memory access module is also coupled to the memory.
Abstract: A PCIe controller and a loopback path using the PCIe controller. The PCIe controller includes: a transport layer transmission module, a transport layer reception module, a memory access module, and a memory, wherein the transport layer transmission module includes a first loopback control module, the transport layer reception module includes a second loopback control module, and the first loopback control module is coupled to the second loopback control module; the memory access module is coupled to the transport layer transmission module and the transport layer reception module, and the memory access module is also coupled to the memory.