Patents Assigned to Chi Mei Electronics Corp.
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Publication number: 20030128309Abstract: A color filter substrate for an LCD device comprises a transparent substrate having a substantially flat surface, a black matrix, a plurality of color filters, an electrode, a plurality of spacers, and an alignment film. The black matrix is formed on predetermined regions of the substrate. The plurality of color filters are formed between the regions of the black matrix with overlapping portions on the edge. The electrode is formed over the black matrix and the color filters. The plurality of spacers are formed on the regions of the black matrix without overlapping with the color filters, and the alignment film for aligning the liquid crystal molecular is formed over the black matrix, the color filters, the electrode, and the spacers.Type: ApplicationFiled: January 7, 2002Publication date: July 10, 2003Applicant: CHI MEI ELECTRONICS CORPInventor: Tsutomu Yamada
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Publication number: 20030128312Abstract: A liquid crystal display mainly includes a first substrate and a second substrate processed for vertical alignment; a liquid crystal having a negative dielectric constant anisotropy and being sandwiched between the first and second substrates; an array of protrusions arranged in parallel to one another on the first substrate; and an array of slits provided on the pixel electrodes. The second substrate is provided with a plurality of gate lines, a plurality of data lines and a plurality of pixel electrodes. The pixel electrodes have first edges parallel to the gate lines and second edges parallel to the data lines. The protrusions have branches formed at positions facing the second edges of the pixel electrode in a manner that the angle included between the branches of the protrusions and the slits is kept at most 45 degrees.Type: ApplicationFiled: June 19, 2002Publication date: July 10, 2003Applicant: CHI MEI ELECTRONICS CORP.Inventors: Rung Nan Lu, Yuan Liang Wu, Chun Hung Liou
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Patent number: 6317113Abstract: The present invention discloses a method for driving a tin film transistor, and more particularly, a method for driving a thin film transistor of a liquid crystal display. Voltage for driving a gate is changed such that peak values of the gate pulse voltage in positive field periodic scanning time and negative field periodic scanning time are not equal, and the difference therebetween is not larger than double of voltage peak value of a data signal line. Therefore, voltage reduction of liquid crystal capacitor can be decreased without enlarging the capacitance thereof. Further, since the gate voltage applied is smaller in a half of each period, the thin film transistor of the liquid crystal display is less influenced by an electric field and thus the voltage stress is reduced.Type: GrantFiled: August 27, 1999Date of Patent: November 13, 2001Assignee: Chi Mei Electronics Corp.Inventor: Biing-Seng Wu
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Patent number: 6261880Abstract: A method for forming a TFT device comprises the following steps. First, a first metal layer, a first insulating layer, a active layer and a contact layer are formed on the substrate in sequence. Next, a first photomask is used to define the contact layer, the active layer, the first insulating layer, and the first metal layer. Then, a second insulating layer and a transparent conducting layer are formed on the contact layer and the substrate in sequence. A second photomask is used to define the second insulating layer and the transparent conducting layer to expose a surface of the contact layer. A second metal layer is formed on the transparent conducting layer and contact layer. A third photomask is used to define the second metal layer to form the S/D structures. Then, the S/D structures are used to serve as a mask for etching the contact layer.Type: GrantFiled: May 24, 1999Date of Patent: July 17, 2001Assignee: Chi Mei Electronics CorpInventor: Biing-Seng Wu
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Patent number: 6184069Abstract: A method of forming a TFT-LCD with self-aligned transparent conducting layer over a substrate comprises the following steps. Initially, a first metal layer is formed on the substrate. Then, an insulating layer is formed on the substrate. A silicon layer is formed above the insulator layer. A doped silicon layer is formed above the silicon layer. A second metal layer is formed on the doped silicon layer, the silicon layer, and the substrate to define S/D structures and data lines. Then, a passivation layer is formed on the second metal layer, the silicon layer, and the insulating layer. A transparent conducting layer is formed on the passivation layer. Then, a negative photoresist is formed on the transparent conducting layer. A front-side exposure step is performed by using a first photomask. Additionally, a back-side exposure step is performed by using the first metal layer and the second metal layer as a mask.Type: GrantFiled: May 24, 1999Date of Patent: February 6, 2001Assignee: Chi Mei Electronics Corp.Inventor: Biing-Seng Wu