Patents Assigned to Chiaro Networks, Ltd.
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Patent number: 7324500Abstract: A router line card is partitioned to separate the packet forwarding functions from physical port interfacing. For each packet forwarding card, at least one redundant port interface is provided. Identical input packets are transmitted via these redundant input port interfaces, one of which is eventually selected based on, for example, SONET standard criteria. If there is a failure, the router selects the interface path that is operating properly and rejects the path containing a failed element. Thus, the router decides locally how to correct the problem internally. Moreover, following an equipment failure the now offline failed interface path can be replaced, while the equipment remains in service using the duplicated interface path. The system can be restored to full duplex operation without affecting the existing traffic, providing for a hot replacement of a failed path. Because the interfaces are separate, a failed module can be renewed and replaced while the equipment is in service.Type: GrantFiled: October 31, 2000Date of Patent: January 29, 2008Assignee: Jeremy Benjamin as Receiver for Chiaro Networks Ltd.Inventors: Harry C. Blackmon, Tony M. Brewer, Harold W. Dozier, Thomas C. McDermott, III, Gregory S. Palmer
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Patent number: 7307979Abstract: A router rolls back a current running configuration to a selected prior running configuration without requiring interruption or reinitialization of the router or of its network connections. The router retrieves command line interface control settings associated with the selected prior running configuration and those associated with the current running configuration. The router then generates and executes a rollback script based on the difference between the prior control settings and the current control settings.Type: GrantFiled: July 31, 2002Date of Patent: December 11, 2007Assignee: Jeremy Benjamin as Receiver for Chiaro Networks LtdInventor: Lance A. Visser
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Patent number: 7292535Abstract: In highly-available Open Shortest Path First (OSPF) routing in a network, the dynamic state of a backup OSPF instance in a router is synchronized with the dynamic state of an active OSPF instance using explicit message transmission from the active instance to the backup instance. After this, the dynamic state synchronization of the backup OSPF instance is maintained using a combination of explicit message updates from the active OSPF instance together with a message flow-through mechanism. In the event of fail-over of the active OSPF instance, then the router recovers seamlessly without reconfiguring or interrupting traffic among peer routers in the network, by functionally substituting the synchronized backup OSPF instance for the active OSPF instance, such that the backup OSPF instance establishes itself as the new active OSPF instance.Type: GrantFiled: May 23, 2002Date of Patent: November 6, 2007Assignee: Chiaro Networks LtdInventors: Ronald P. Folkes, Lance A. Visser, Thomas L. Watson
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Patent number: 7133399Abstract: A centralized arbitration mechanism provides that a router switch fabric is configured in a consistent fashion. Remotely distributed packet forwarding modules determine which data chunks are ready to go through the optical switch and communicates this to the central arbiter. Each packet forwarding module has an ingress ASIC containing packet headers in roughly four thousand virtual output queues. Algorithms choose at most two chunk requests per chunk period to be sent to the arbiter, which queues up to roughly 24 requests per output port. Requests are sent through a Banyan network, which models the switch fabric and scales on the order of NlogN, where N is the number of router output ports. Therefore a crossbar switch function can be modeled up to the 320 output ports physically in the system, and yet have the central arbiter scale with the number of ports in a much less demanding way. An algorithm grants at most two requests per port in each chunk period and returns the grants to the ingress ASIC.Type: GrantFiled: October 31, 2000Date of Patent: November 7, 2006Assignee: Chiaro Networks LtdInventors: Tony M. Brewer, Gregory S. Palmer, Keith W. Shaw
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Patent number: 7058315Abstract: A repetitive burst-mode input signal that has a dark time portion, a preamble portion, and a payload portion is converted into a limited output signal in accordance with a decision threshold level, which is controlled by selectively coupling an averaged value of the burst-mode data amplitude to the decision threshold level. The timing sequence for selectively coupling the averaged signal value is controlled such that the average value of the burst-mode signal acquired during the preamble portion of the burst-mode signal is applied to the decision threshold level during substantially all of the payload portion. The control circuit may incorporate a phase-locked loop, which locks onto the repetitive dark time frequency and in response synthesizes a switchable track enable signal that controls the timing sequence of the decision threshold level. The phase-locked loop can employ all-digital, analog, and/or hybrid digital/analog circuitry.Type: GrantFiled: October 9, 2001Date of Patent: June 6, 2006Assignee: Chiaro Networks Ltd.Inventors: Tony M. Brewer, Christopher P. Davies, Thomas C. McDermott, III, Allen F. Rozman
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Publication number: 20060062233Abstract: In a multi-QOS level queuing structure, packet payload pointers are stored in multiple queues and packet payloads in a common memory pool. Algorithms control the drop probability of packets entering the queuing structure. Instantaneous drop probabilities are obtained by comparing measured instantaneous queue size with calculated minimum and maximum queue sizes. Non-utilized common memory space is allocated simultaneously to all queues. Time averaged drop probabilities follow a traditional Weighted Random Early Discard mechanism. Algorithms are adapted to a multi-level QOS structure, floating point format, and hardware implementation. Packet flow from a router egress queuing structure into a single egress port tributary is controlled by an arbitration algorithm using a rate metering mechanism. The queuing structure is replicated for each egress tributary in the router system.Type: ApplicationFiled: November 14, 2005Publication date: March 23, 2006Applicant: Chiaro Networks Ltd.Inventors: Tony Brewer, Jim Kleiner, Gregory Palmer, Keith Shaw
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Patent number: 7002980Abstract: In a multi-QOS level queuing structure, packet payload pointers are stored in multiple queues and packet payloads in a common memory pool. Algorithms control the drop probability of packets entering the queuing structure. Instantaneous drop probabilities are obtained by comparing measured instantaneous queue size with calculated minimum and maximum queue sizes. Non-utilized common memory space is allocated simultaneously to all queues. Time averaged drop probabilities follow a traditional Weighted Random Early Discard mechanism. Algorithms are adapted to a multi-level QOS structure, floating point format, and hardware implementation. Packet flow from a router egress queuing structure into a single egress port tributary is controlled by an arbitration algorithm using a rate metering mechanism. The queuing structure is replicated for each egress tributary in the router system.Type: GrantFiled: December 19, 2000Date of Patent: February 21, 2006Assignee: Chiaro Networks, Ltd.Inventors: Tony M. Brewer, Jim Kleiner, Gregory S. Palmer, Keith W. Shaw
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Patent number: 6999411Abstract: In a router with redundant central arbiters, a set of control processors (CPs) determines which arbiter is active, which is standby, and when to switch between them. In normal operation ingress ASICs issue requests to the active central arbiter ASIC and keep-alive requests cyclically once per chunk period to the passive arbiter ASIC, which then returns keep-alive grants through the same links to the ingress ASICs and sends standby configuration information to the optical switch ASICs. The arbiter ASICs pass a switch-over decision simultaneously to the optical switch ASICs and ingress ASICs, which empty all queues of outstanding requests, and then resend all of those requests to the new active central arbiter after all queues are empty, such that no router traffic is lost. Mechanisms ensure that during the transition the ASICs properly recognize which data links are healthy and which arbiter is active.Type: GrantFiled: January 12, 2001Date of Patent: February 14, 2006Assignee: Chiaro Networks, Ltd.Inventors: Tony M. Brewer, Gregory S. Palmer, Keith W. Shaw
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Patent number: 6993024Abstract: A multicast packet is transferred through a switching fabric from an input line card to a dedicated multicast card, which is substantially the same as an input and output line card, but without external facility interfaces. A dedicated output multicast card converts the multicast packet from an optical to an electrical packet and passes it to a dedicated input multicast card, where the packet is replicated electrically, converted back to an optical packet, and then transferred through the switching fabric to multiple destinations. In some embodiments, input and output dedicated multicast cards are actually a single card. Transfer of the multicast packet to multiple destinations occurs sequentially or simultaneously during a single switching cycle, if multiple parallel switching paths exist through the switching fabric. Some embodiments include multiple dedicated multicast cards, allowing rapid simultaneous expansion of the multicast tree.Type: GrantFiled: November 16, 2000Date of Patent: January 31, 2006Assignee: Chiaro Networks, Ltd.Inventors: Thomas C. McDermott, III, Jim Kleiner
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Patent number: 6917725Abstract: A method of producing a modulated light source including the steps of providing a modulator, fiberlessly coupling a laser diode light source to the modulator and enclosing the modulator and the laser diode light source within a housing together with output optics operative to direct modulated light from the modulator into an optical fiber extending outwardly from the housing.Type: GrantFiled: April 8, 2003Date of Patent: July 12, 2005Assignee: Chiaro Networks Ltd.Inventor: Eyal Shekel
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Patent number: 6894970Abstract: Instead of alternatively utilizing only one fabric or the other fabric of a redundant pair, both fabrics simultaneously transmit duplicate information, such that each packet forwarding module (PFM) receives the output of both fabrics simultaneously. In real time, an internal optics module (IOM) analyzes each information chunk coming out of a working zero switch fabric; simultaneously examines a parallel output of a working one duplicate switch fabric; and compares on a chunk-by-chunk basis the validity of each and every chunk from both switch fabrics. The IOM does this by examining forward error correction (FEC) check symbols encapsulated into each chunk. FEC check symbols allow correcting a predetermined number of bit errors within a chunk. If the chunk cannot be corrected, then the IOM provides indication to all PFMs downstream that the chunk is defective. Under such conditions, the PFMs select a chunk from the non-defective switch fabric.Type: GrantFiled: October 31, 2000Date of Patent: May 17, 2005Assignee: Chiaro Networks, Ltd.Inventors: Thomas C. McDermott, III, Harry C. Blackmon, Tony M. Brewer, Harold W. Dozier, Jim Kleiner, Gregory S. Palmer, Keith W. Shaw, David Traylor, Dean E. Walker
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Patent number: 6886994Abstract: A method for accurately mounting an optical element in an optical assembly including precisely positioning the optical element in a desired position with respect to a reference surface, employing a non-metallic adhesive for initially fixing the optical element in the desired position and thereafter employing a metallic adhesive for permanently fixing the optical element in the desired position.Type: GrantFiled: July 18, 2002Date of Patent: May 3, 2005Assignee: Chiaro Networks Ltd.Inventors: Eyal Shekel, Levy Jeffrey, Michael Rodman
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Publication number: 20050083921Abstract: Instead of alternatively utilizing only one fabric or the other fabric of a redundant pair, both fabrics simultaneously transmit duplicate information, such that each packet forwarding module (PFM) receives the output of both fabrics simultaneously. In real time, an internal optics module (IOM) analyzes each information chunk coming out of a working zero switch fabric; simultaneously examines a parallel output of a working one duplicate switch fabric; and compares on a chunk-by-chunk basis the validity of each and every chunk from both switch fabrics. The IOM does this by examining forward error correction (FEC) check symbols encapsulated into each chunk. FEC check symbols allow correcting a predetermined number of bit errors within a chunk. If the chunk cannot be corrected, then the IOM provides indication to all PFMs downstream that the chunk is defective. Under such conditions, the PFMs select a chunk from the non-defective switch fabric.Type: ApplicationFiled: November 5, 2004Publication date: April 21, 2005Applicant: Chiaro Networks Ltd.Inventors: Thomas McDermott, Harry Blackmon, Tony Brewer, Harold Dozier, Jim Kleiner, Gregory Palmer, Keith Shaw, David Traylor, Dean Walker
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Patent number: 6879559Abstract: Router line cards are partitioned, separating packet forwarding from external or internal interfaces and enabling multiple line cards to access any set of external or internal data paths. Any failed working line card can be switchably replaced by another line card. In particular, a serial bus structure on the interface side interconnects any interface port within a protection group with a protect line card for that group. Incremental capacity allows the protect line card to perform packet forward functions. Logical mapping of line card addressing and identification provides locally managed protection switching of a line card that is transparent to other router line cards and to all peer routers. One-for-N protection ratios, where N is some integer greater than two, can be achieved economically, yet provide sufficient capacity with acceptable protection switch time under 100 milliseconds.Type: GrantFiled: October 31, 2000Date of Patent: April 12, 2005Assignee: Chiaro Networks, Ltd.Inventors: Harry C. Blackmon, Tony M. Brewer, Harold W. Dozier, Jim Kleiner, Thomas C. McDermott, III, Gregory S. Palmer, Keith W. Shaw, David Traylor
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Patent number: 6876657Abstract: Hardware interconnected around multiple packet forwarding engines prepends sequence numbers to packets going into multiple forwarding engines through parallel paths, After processing by the multiple forwarding engines, packets are reordered using queues and a packet ordering mechanism, such that the sequence numbers are put back into their original prepended order. Exception packets flowing through the forwarding engines do not follow a conventional fast path, but are processed off-line and emerge from the forwarding engines out of order relative to fast path packets. These exception packets are marked, such that after they exit the forwarding engines, they are ordered among themselves independent of conventional fast path packets. Viewed externally, all exception packets are ordered across all multiple forwarding engines independent of the fast path packets.Type: GrantFiled: December 14, 2000Date of Patent: April 5, 2005Assignee: Chiaro Networks, Ltd.Inventors: Tony M. Brewer, Michael K. Dugan, Jim Kleiner, Gregory S. Palmer, Paul F. Vogel
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Patent number: 6853617Abstract: If an active router Master Control Processor (MCP) fails, a backup MCP switches over without interrupting peer network router connections, because all previously established connection parameters are replicated on both MCPs. Once the MCP programs line cards, the packet forwarding modules and embedded system function without further involvement of the MCP until the next programming update. Messages flow through the backup MCP and then through the active MCP, which outputs messages through the backup MCP. Thus the backup MCP captures state changes before and after the active MCP. Both MCPs maintain replicated queues in which they store replicated messages awaiting processing or retransmission. If acknowledgment of receiving a transmitted message is received from a destination peer router, that message is deleted from both MCPs. If acknowledgment is not received within a predetermined interval, the stored message is retransmitted.Type: GrantFiled: May 9, 2001Date of Patent: February 8, 2005Assignee: Chiaro Networks, Ltd.Inventors: Thomas L. Watson, David D. Baukus, Ronald Paul Folkes, Lance Arnold Visser
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Patent number: 6799370Abstract: An improved manufacturing technique for optical fiber arrays employs optical feedback in a partially assembled unit using an inspection camera. This allows immediate reworking of a problematic part. In the present invention, a video microscope is used to check the alignment of the optical fiber array during the manufacturing process. After the optical fiber array has been glued or otherwise affixed, then an optical device may be used to measure the performance of the glued assembly.Type: GrantFiled: June 28, 2001Date of Patent: October 5, 2004Assignee: Chiaro Networks Ltd.Inventors: Eyal Shekel, Eli Rephaeli
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Patent number: 6711357Abstract: Information and control are synchronized as they flow through a large distributed IP router system with independent clocks. The IP router includes multiple equipment racks and shelves, each containing multiple modules. The IP router is based on a passive switching device, which in some embodiments is an optical switch. Control and data come to the switching device from different sources, which have different clocks. Timing and synchronization control are provided, such that information and control both arrive at the switching device at the proper time. A single point in the system originates timing, which is then distributed through various ASICs of the system to deliver configuration control to the switch at the appropriate time. The launch of information to the switch is also controlled with a dynamic feedback loop from an optical switch controller. Control aspects of the optical switch are aligned by this same mechanism to deliver control and data to the optical switch simultaneously.Type: GrantFiled: October 31, 2000Date of Patent: March 23, 2004Assignee: Chiaro Networks Ltd.Inventors: Tony Brewer, Harry C. Blackmon, Harold W. Dozier, William D. O'Leary, Dean E. Walker
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Patent number: 6704473Abstract: Two N-channel deflector modules, both located in the same layer or plane of an assembly, direct polarized beams toward a polarization beam splitter. A half wave plate is interposed between one of the deflector modules and the polarization beam splitter. The polarization beam splitter combines the two beams into a single output beam, without loss of optical power, comprising 2N channels, each of which can carry a unique data stream. In alternate embodiments the group of two deflector modules and a polarization beam splitter can be stacked, optionally in combination with layers comprising a single deflector module and polarization beam splitter or mirror.Type: GrantFiled: July 2, 2001Date of Patent: March 9, 2004Assignee: Chiaro Networks Ltd.Inventors: Shlomo Ruschin, Eyal Shekel, Michael Rudman
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Publication number: 20040017963Abstract: A method of producing a modulated light source including the steps of providing a modulator, fiberlessly coupling a laser diode light source to the modulator and enclosing the modulator and the laser diode light source within a housing together with output optics operative to direct modulated light from the modulator into an optical fiber extending outwardly from the housing.Type: ApplicationFiled: April 8, 2003Publication date: January 29, 2004Applicant: Chiaro Networks Ltd.Inventor: Eyal Shekel