Abstract: A method for fault isolation includes: acquiring a thermal imaging picture of a surface of a to-be-tested chip, the thermal imaging picture being obtained by scanning the to-be-tested chip to which a test signal is applied through an infrared thermal imaging device, and analyzing the thermal imaging picture to obtain a phase angle of each point on the surface of the to-be-tested chip; acquiring a three-dimensional image of the surface of the to-be-tested chip, the three-dimensional image being obtained by scanning the to-be-tested chip to which the test signal is applied through an image scanning device, and analyzing the three-dimensional image to obtain a three-dimensional coordinate of each point on the surface of the to-be-tested chip; calculating a three-dimensional coordinate of the fault in the to-be-tested chip according to the phase angle and the three-dimensional coordinate of each point on the surface of the to-be-tested chip.
Type:
Grant
Filed:
December 5, 2022
Date of Patent:
July 1, 2025
Assignee:
China Electronics Reliability And Environmental Testing Institute
Abstract: A method for fault isolation includes: acquiring a thermal imaging picture of a surface of a to-be-tested chip, the thermal imaging picture being obtained by scanning the to-be-tested chip to which a test signal is applied through an infrared thermal imaging device, and analyzing the thermal imaging picture to obtain a phase angle of each point on the surface of the to-be-tested chip; acquiring a three-dimensional image of the surface of the to-be-tested chip, the three-dimensional image being obtained by scanning the to-be-tested chip to which the test signal is applied through an image scanning device, and analyzing the three-dimensional image to obtain a three-dimensional coordinate of each point on the surface of the to-be-tested chip; calculating a three-dimensional coordinate of the fault in the to-be-tested chip according to the phase angle and the three-dimensional coordinate of each point on the surface of the to-be-tested chip.
Type:
Application
Filed:
December 5, 2022
Publication date:
February 1, 2024
Applicant:
China Electronics Reliability And Environmental Testing Institute
Abstract: An industrial robot motion accuracy compensation method includes: establishing a motion parameter database, wherein the motion parameter database includes a plurality of different reference operating conditions and a motion parameter of the industrial robot corresponding to each reference operating condition, and each reference operating condition is formed by combining each element in each set in a total set of operation conditions; acquiring a current operating condition of the industrial robot; determining whether there is a reference operating condition matched with the current operating condition in the motion parameter database; if yes, taking a motion parameter corresponding to the matched reference operating condition as a motion parameter corresponding to the current operating condition; if no, performing an interpolation on a motion parameter corresponding to the current operating condition, and taking an interpolation result as the motion parameter corresponding to the current operating condition.
Type:
Application
Filed:
October 13, 2022
Publication date:
May 4, 2023
Applicant:
China Electronics Reliability And Environmental Testing Institute ((The Fifth Institute of Electroni