Abstract: The present invention discloses a self-aligned register structure for base polysilicon and a preparation method thereof. The self-aligned register structure comprises a silicon substrate having a partially oxidized region of SiO2 medium, a SiO2 medium protective layer is arranged at a center above the silicon substrate, base polysilicon layers are located at left and right sides of the SiO2 medium protective layer, the adjacent base polysilicon layers are symmetrical to the SiO2 medium protective layer at equal spacing, and the spacing is equal to a thickness of the base polysilicon layer.
Type:
Grant
Filed:
December 29, 2017
Date of Patent:
May 18, 2021
Assignee:
CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION NO.
55 RESEARCH INSTITUTE
Abstract: The present invention discloses a self-aligned register structure for base polysilicon and a preparation method thereof. The self-aligned register structure comprises a silicon substrate having a partially oxidized region of SiO2 medium, a SiO2 medium protective layer is arranged at a center above the silicon substrate, base polysilicon layers are located at left and right sides of the SiO2 medium protective layer, the adjacent base polysilicon layers are symmetrical to the SiO2 medium protective layer at equal spacing, and the spacing is equal to a thickness of the base polysilicon layer.
Type:
Application
Filed:
December 29, 2017
Publication date:
February 27, 2020
Applicant:
CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION NO. 55 RESEARCH INSTITUTE
Abstract: A nitride high electron mobility transistor having a strain balance of an aluminum gallium nitride insertion layer is described. The transistor sequentially includes: a substrate and a GaN buffer layer located on the substrate; an AlyGa1-yN insertion layer located on the GaN buffer layer; an AlxGa1-xN barrier layer located on the AlyGa1-yN insertion layer opposite to the GaN buffer layer; a GaN cap layer located on the AlxGa1-xN barrier layer; a “?”-shaped source electrode and drain electrode provided in recesses formed by the removal of the GaN cap layer and some thickness of the AlxGa1-xN barrier layer; and a gate electrode located between the source electrode and the drain electrode. An AlzGa1-zN insertion layer may be further included between the AlxGa1-xN barrier layer and the GaN cap layer.
Type:
Application
Filed:
December 23, 2016
Publication date:
June 28, 2018
Applicant:
CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION NO. 55 RESEARCH INSTITUTE
Abstract: Provided is an amplifier circuit with cross wiring of direct-current signals and microwave signals, which includes: two branch sub-circuits being mirrors with each other and a third capacitor The sub-circuit includes a direct-current feeding circuit and a microwave signal circuit. The direct-current feeding circuit further comprising: a transistor core drain power-up port (Vds) of a heterojunction field effect transistor (FET), a first micro-strip inductor, a first capacitor, a pair of third inductors, a pair of branched second inductors. The microwave signal circuit further comprising: A pair of third inductors, a pair of first capacitors, a pair of second capacitors, a pair of ground inductors, a pair of fourth inductors, a serially connected fifth inductor.
Type:
Grant
Filed:
June 19, 2012
Date of Patent:
October 20, 2015
Assignee:
CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION NO. 55 RESEARCH INSTITUTE
Abstract: Provided is an amplifier circuit with cross wiring of direct-current signals and microwave signals, which includes: two branch sub-circuits being mirrors with each other and a third capacitor The sub-circuit includes a direct-current feeding circuit and a microwave signal circuit. The direct-current feeding circuit further comprising: a transistor core drain power-up port (Vds) of a heterojunction field effect transistor (FET), a first micro-strip inductor, a first capacitor, a pair of third inductors, a pair of branched second inductors. The microwave signal circuit further comprising: A pair of third inductors, a pair of first capacitors, a pair of second capacitors, a pair of ground inductors, a pair of fourth inductors, a serially connected fifth inductor.
Type:
Application
Filed:
June 19, 2012
Publication date:
June 11, 2015
Applicant:
CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION NO.55 RESEARCH INSTITUTE
Abstract: Disclosed is an amplifier circuit with cross wiring of direct-current signals and microwave signals. The circuit includes a circuit network unit formed of a direct-current feeding circuit and a microwave power signal circuit. The direct-current feeding circuit comprises a high-electron-mobility transistor (HEMT) drain power-up bonding point, a corresponding line, a feeding end of a tail-level HEMT transistor core, a first Metal-insulator-Metal (MIM) capacitor, a first micro-strip inductor, symmetrical branch micro-strips, a second MIM capacitors. The microwave power signal circuit comprises a signal end of the tail-level HEMI transistor core, two third MIM capacitors, other electrode of the second MIM capacitors, a ground micro-strip inductors, a second micro-strip inductors, a third micro-strip inductor, a fourth MIM capacitor.
Type:
Application
Filed:
June 19, 2012
Publication date:
May 7, 2015
Applicant:
CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION NO. 55 RESEARCH INSTITUTE