Abstract: The present disclosure relates to a method for demodulating a frequency modulated signal of a PMA standard wireless charging device, including: (1) reading coil signals, sampling the coil signals, and counting cycles; (2) extracting a frequency change according to a change in a cycle count; (3) determining data according to the frequency change and a frequency duration and outputting the data; and (4) splicing the outputted data. With the method, a demodulation part does not require a complex analog circuit, and the highest frequency desired at a digital circuit part is only 4 MHz. Moreover, at this frequency, there is only a simple addition operation, and the main operating frequency is below 236 KHz.

Abstract: A circuit structure for efficiently demodulating an FSK signal in a wireless charging device, comprising a data sampling module, a period point counting module, a data distribution module, and a period point processing module. An input terminal of the period point counting module is connected to an output terminal of the data sampling module; an input terminal of the data distribution module is connected to an output terminal of the period point counting module; and an input terminal of the period point processing module is connected to an output terminal of the data distribution module.

Abstract: A discharge circuit integrated in a chip of a slave device to follow a bus rectifier bridge includes: a digital control module for generating, when an output result of a comparator is that a bus voltage falls, a high-level and time-configurable pulse width to drive a discharge circuit to discharge a bus; a discharge current source module for enabling the discharge of the bus by means of a digital control module and adjusting a discharge current; a comparator for obtaining a status of a change in the bus voltage; and a peripheral circuit for monitoring the change in the bus voltage, providing to the comparator a voltage signal which reflects divided bus voltage fall information, and generating a comparison reference voltage.

Abstract: A discharge circuit integrated in a chip of a slave device to follow a bus rectifier bridge includes: a digital control module for generating, when an output result of a comparator is that a bus voltage falls, a high-level and time-configurable pulse width to drive a discharge circuit to discharge a bus; a discharge current source module for enabling the discharge of the bus by means of a digital control module and adjusting a discharge current; a comparator for obtaining a status of a change in the bus voltage; and a peripheral circuit for monitoring the change in the bus voltage, providing to the comparator a voltage signal which reflects divided bus voltage fall information, and generating a comparison reference voltage.

Abstract: A circuit structure for efficiently demodulating an FSK signal in a wireless charging device, comprising a data sampling module, a period point counting module, a data distribution module, and a period point processing module. An input terminal of the period point counting module is connected to an output terminal of the data sampling module; an input terminal of the data distribution module is connected to an output terminal of the period point counting module; and an input terminal of the period point processing module is connected to an output terminal of the data distribution module.

Abstract: The present disclosure relates to a method for demodulating a frequency modulated signal of a PMA standard wireless charging device, including: (1) reading coil signals, sampling the coil signals, and counting cycles; (2) extracting a frequency change according to a change in a cycle count; (3) determining data according to the frequency change and a frequency duration and outputting the data; and (4) splicing the outputted data. With the method, a demodulation part does not require a complex analog circuit, and the highest frequency desired at a digital circuit part is only 4 MHz. Moreover, at this frequency, there is only a simple addition operation, and the main operating frequency is below 236 KHz.

Abstract: Disclosed is a circuit structure for implementing an adaptive function in a class-D audio power amplifier circuit, comprising an operation amplifier, a pulse width modulator and a driver stage that are sequentially and serially connected, an input terminal of the operation amplifier being connected to an external audio signal output terminal, and an output terminal of the driver stage being connected to a loudspeaker and connected to the input terminal of the operation amplifier via a feedback loop. The circuit structure further comprises: one or a plurality of a carrier adaptive circuit, a frequency adaptive circuit, a driver adaptive circuit, a temperature adaptive circuit.