Patents Assigned to Chino-Excel Technologies, Corp.
  • Patent number: 6917117
    Abstract: A method of mounting flip-chip for lowering the on-resistance of power transistor in the protection circuit of rechargeable battery, which comprises a power field effect transistor and a protection IC, has the following steps: first, serially connect drain metal contacts of two transistors to form a chip cell during fabrication of wafer; then, use welding torch to point weld the metal wire on contact of each chip cell, so that the source and gate contacts will form welding metal bumps respectively; cut the wafer to form bare chip cells of two serially connected gate electrodes; stain said chip cell with tin so that said welding metal bumps on contacts are attached with tin balls; apply plastic material to positioned points of printed circuit board; use flip-chip technology to make drain of a bare chip cell face upward, so that said tin balls are aligned with the positioned points of printed circuit board; finally, passing through an oven for heating and pressuring, so that said tin balls will fuse and said pl
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: July 12, 2005
    Assignee: Chino-Excel Technologies, Corp.
    Inventors: Feng-Tso Chien, Chii-Wen Chen, Kou-Way Tu, Zheng-Feng Lin
  • Publication number: 20040256703
    Abstract: A wireless bonded semiconductor device comprises a semiconductor chip packaged on a metal lead frame, in which the semiconductor chip contains at least one contact electrically connected to a lead frame and a connecting-pin terminal leading out from its bottom face, and at least one contact and a plurality of individual connecting-pin terminals leading out from its top face, there is no metal bonding wire exists between the surface contact and individual connecting-pin terminals, instead a matrix of the connecting-pin terminal with pre-determined extension length that directly folded and bonded onto the surface contact of the semiconductor chip is employed.
    Type: Application
    Filed: July 15, 2004
    Publication date: December 23, 2004
    Applicant: Chino-Excel Technology Corp.
    Inventors: Kou-Way Tu, Feng-Tso Chien, You-Ren Li, Cheng-Hui Tung
  • Publication number: 20040070081
    Abstract: A method of mounting flip-chip for lowering the on-resistance of power transistor in the protection circuit of rechargeable battery, which comprises a power field effect transistor and a protection IC, has the following steps: first, serially connect drain metal contacts of two transistors to form a chip cell during fabrication of wafer; then, use welding torch to point weld the metal wire on contact of each chip cell, so that the source and gate contacts will form welding metal bumps respectively; cut the wafer to form bare chip cells of two serially connected gate electrodes; stain said chip cell with tin so that said welding metal bumps on contacts are attached with tin balls; apply plastic material to positioned points of printed circuit board; use flip-chip technology to make drain of a bare chip cell face upward, so that said tin balls are aligned with the positioned points of printed circuit board; finally, passing through an oven for heating and pressuring, so that said tin balls will fuse and said pl
    Type: Application
    Filed: July 23, 2003
    Publication date: April 15, 2004
    Applicant: Chino-Excel Technologies Corp.
    Inventors: Feng-Tso Chien, Chii-Wen Chen, Kou-Way Tu, Zheng-Feng Lin
  • Publication number: 20030151090
    Abstract: The invention disclosed a power MOSFET with reduced snap-back and being capable increasing avalanche-breakdown current endurance, which has sequentially a drain with N+ silicon substrate, an N31 epitaxial layer formed on said N+ silicon substrate, a source contact region formed of N+ doped well and P+ doped well implanted after etching in a P− well formed on said N− epitaxial layer, and a gate electrode with deposition of polysilicon above a channel between said N− epitaxial layer and N+ source contact region, said device is characterized in that: Said source contact region is formed by etching into said P− well first and implanting P+ dopant to the interface between said N− epitaxial layer and P− well, and the source contact region of said N+ well and that of said P+ well are not at the same level, by which it is possible to increase the avalanche-breakdown current endurance of the power MOSFET device.
    Type: Application
    Filed: January 14, 2003
    Publication date: August 14, 2003
    Applicant: Chino-Excel Technologies Corp.
    Inventor: Feng-Tso Chien
  • Publication number: 20030094678
    Abstract: A wireless bonded semiconductor device comprises a semiconductor chip packaged on a metal lead frame, in which the semiconductor chip contains at least one contact electrically connected to a lead frame and a connecting-pin terminal leading out from its bottom face, and at least one contact and a plurality of individual connecting-pin terminals leading out from its top face, there is no metal bonding wire exists between the surface contact and individual connecting-pin terminals, instead a matrix of the connecting-pin terminal with pre-determined extension length that directly folded and bonded onto the surface contact of the semiconductor chip is employed.
    Type: Application
    Filed: November 18, 2002
    Publication date: May 22, 2003
    Applicant: CHINO-EXCEL TECHNOLOGY CORP.
    Inventors: Kou-Way Tu, Feng-Tso Chien, You-Ren Li, Cheng-Hui Tung
  • Publication number: 20030095393
    Abstract: A wireless bonded semiconductor device comprises a semiconductor chip packaged on a metal lead frame, in which the semiconductor chip contains at least one contact electrically connected to a lead frame and a connecting-pin terminal leading out from its bottom face, and at least one contact and a plurality of individual connecting-pin terminals leading out from its top face, there is no metal bonding wire exists between the surface contact and individual connecting-pin terminals, instead a matrix of the connecting-pin terminal with pre-determined extension length that directly folded and bonded onto the surface contact of the semiconductor chip is employed.
    Type: Application
    Filed: September 18, 2002
    Publication date: May 22, 2003
    Applicant: Chino-Excel Technologies Corp.
    Inventors: Kou-Way Tu, Feng-Tso Chien, You-Ren Li, Jen-Huei Dung