Abstract: A method for preparing an array substrate and an array substrate. The method for preparing an array substrate includes: depositing a first metal layer, an insulating layer, an active layer and a doping layer on the substrate; forming a photoresist on doping layer by using a first photomask process, and etching the photoresist to form a gate and a channel; depositing a second metal layer on the substrate; using the second photomask process to form the source-drain metal layer; depositing a passivation layer on the substrate; using the third photomask process to form a pixel electrode layer.

Abstract: A method for preparing an array substrate and an array substrate. The method for preparing an array substrate includes: depositing a first metal layer, an insulating layer, an active layer and a doping layer on the substrate; forming a photoresist on doping layer by using a first photomask process, and etching the photoresist to form a gate and a channel; depositing a second metal layer on the substrate; using the second photomask process to form the source-drain metal layer; depositing a passivation layer on the substrate; using the third photomask process to form a pixel electrode layer.

Abstract: This application relates to a printed circuit board, including: a plurality of bonding pad areas configured to be electrically connected to a display; a plurality of dummy pad areas located in the plurality of bonding pad areas and configured to be connected to the ground; and a contact pad area existing between the plurality of dummy pad areas and electrically connected to the bonding pad area. The contact pad area includes a plurality of contact pads configured to be electrically connected to an external input connector. A width of the plurality of contact pads is 0.3 mm, and a distance between the plurality of contact pads is 0.2 mm. A length of the contact pad is the same as a length of a bonding pad in the bonding pad area.

Abstract: Disclosed are a gate-on voltage generation circuit, a display panel driving device and a display device. The gate-on voltage generation circuit includes an on/off voltage output terminal, a power management integrated circuit and a voltage switching circuit. The power management integrated circuit includes a detection terminal connected to the on/off voltage output terminal, is configured for detecting a voltage output by the on/off voltage output terminal, and outputting first switch control signal or second switch control signal according to the voltage output from the on/off voltage output terminal. The voltage switching circuit includes a first input terminal for inputting a first voltage value and a second input terminal for inputting a second voltage value larger than the first voltage value. The voltage switching circuit outputs the first voltage value upon receiving the first switch control signal, and outputs the second voltage value upon receiving the second switch control signal.

Abstract: Disclosed are a gate-on voltage generation circuit, a display panel driving device and a display device. The gate-on voltage generation circuit includes an on/off voltage output terminal, a power management integrated circuit and a voltage switching circuit. The power management integrated circuit includes a detection terminal connected to the on/off voltage output terminal, is configured for detecting a voltage output by the on/off voltage output terminal, and outputting first switch control signal or second switch control signal according to the voltage output from the on/off voltage output terminal. The voltage switching circuit includes a first input terminal for inputting a first voltage value and a second input terminal for inputting a second voltage value larger than the first voltage value. The voltage switching circuit outputs the first voltage value upon receiving the first switch control signal, and outputs the second voltage value upon receiving the second switch control signal.

Abstract: This application discloses a display panel testing apparatus and testing method. When a data control circuit receives a first enable signal generated by a switching signal generation circuit, the data control circuit controls a data interface that is output by the data control circuit to be in a high-impedance state.

Abstract: The present disclosure provides a backlight module and a display panel. The backlight module includes a back plate and an optical component fixed on the back plate. A fool-proof structure is disposed on the optical component. The fool-proof structure includes a bulge. The bulge is disposed on a surface of the optical component. The surface of the optical component is matched and fixed with the back plate. A Positioning structure matched and fixed with the fool-proof structure is disposed on the back plate.

Abstract: This application discloses a packing box for a display panel and an accommodating apparatus. The packing box includes: a box body; the display panel including a circuit board and a substrate; and grooves, disposed on the box body, located on both sides of the circuit board, attached to the circuit board and the substrate, and configured to place a desiccant.

Abstract: The present application discloses a method and a test machine platform for quickly searching for a common voltage of a display panel. The method includes: measure a flicker value of the display panel; perform a power conversion on the flicker value, and perform a unary quadratic function fitting on the converted flicker value and the corresponding common voltage; and obtain a common voltage value as a common voltage.

Abstract: Disclosed are a gamma value tuning method of a display panel, which comprises the following steps: setting a preset gamma value interval according to a parameters of a display panel to be tested; acquiring a brightness value of a gray scale on the display panel to be tested; calculating a gamma value corresponding to the brightness value of the gray scale; adjusting the gamma value to the first gamma value when the gamma value is smaller than the first gamma value of the preset gamma value interval; adjusting the gamma value to the second gamma, when the second gamma value in the gamma value is larger than the preset gamma value interval.