Abstract: An information processing system includes a transmitter, which converts parallel information to serial, and a receiver, which receives the serial information and reconverts the same to parallel for use by a further processing unit. Structure is provided to eliminate a requirement for a separate transmission line for transmission of a synchronization signal for synchronizing the receiver to function properly in receiving information. More coupling points are provided at the transmitter than at the receiver, for coupling information into the serial information path. The additional coupling points are used to transmit flag information together with the data being transmitted, the flag information being used to produce a detection signal. The detection signal is used to gate the received signals from a receiving signal path to various storage devices, thus converting the received serial information to parallel form in response to the flag signals which are serially transmitted together with the data.

Abstract: A multiprocessor computer system wherein memory buses of separate central processing unit systems are interfaced to an intermemory communication network for transfer of data between memories of said separate central processing unit systems.The intermemory communication network includes a plurality of preferably passive intermemory communication links being tapped for connection to link adapters interfacing a number of central processing unit systems to each intermemory communication link. The number of central processing unit systems may be different for different intermemory communication links.The memory buses are configurated to allow for direct data transfer between any memory fraction of a common memory shared by at least two central processing unit systems without interfering with the central processing units such that the data transfer is controlled by direct memory access control means.

Abstract: A time multiplex controlled data system containing a plurality of data processing units (2A, 2B . . . 2N) which are connected to a time control unit (1) containing a multiplex table (7). Normally, the data processing units have both a transmitter and a receiver, and the system is so designed that several transmitters are connected to a common, passive bus (3) arranged to carry information only in a direction towards the time control unit (1), while several receivers are connected to a second, passive bus (4) arranged to carry information from the control unit (1) only in a direction towards the data processing units and so that any communication between the data processing units takes place via the time control unit (1).

Abstract: A coupling circuit for transferring data from a data transmitter to a bus common to several transmitters, each data transmitter being galvanically separated from the bus. The coupling circuit has a signal separator and a switch connected in series between its input and an output connected to the bus. The switch is controlled solely by the data signals transferred from the data transmitter via the signal separator and a rectifier circuit.

Abstract: In a square wave generator for the supply of power to a plurality of electric units the advantages of current controlled and voltage controlled generators may be combined by the provision of two output transformers (T1 and T2) whose primary windings are connected in parallel through diodes (D5 and D6), which in case of overloading are blocked by the voltage of a capacitor which itself is connected through a diode which is also blocked by said voltage.

Abstract: A method of supervising a plurality of data processing units in a redundant data processing system for controlling a telephone exchange having redundant digital switching networks, preferably of the TST type (Time-Space-Time), said processing units serving i.a. to set up and delete redundant communication channels through the switching networks. The process is original in that error detecting is provided for by comparing associated telecommunication output data from each switching network, a discrepancy in anyone of said comparisons indicating an error in the set up by the controlling units of the respective communication channel through the switching networks. This obviates microsynchronization of the units which may consequently comprise more than two units.

Abstract: In a transformer of the type having spirally wound copper foil windings, capacitive signal transfer between the primary and secondary windings is avoided by placing the turns of the winding having the smaller number of turns in pairs and placing adjacent each of said turns the turn of the other winding having the same number as the said turn in the sequence of current passage.

Abstract: Apparatus for detecting radar echo signals with a high degree of certainty in the presence of noise. A predetermined number of consecutive, constantly changing invervals are produced having a length equal to the radar pulse width. The resolution of the system is a function of the number of signal positions chosen for examination within each interval. A secondary signal is produced for each signal position and these secondary signals are summed over preselected resolution intervals. A weighting arrangement is provided which weights the individual secondary signals inversely with their distance from the central resolution interval of the set.

Abstract: Apparatus for detecting radar echo signals with a high degree of certainty in the presence of noise. A predetermined number of consecutive, constantly changing intervals are produced having a length equal to the radar pulse width. The resolution of the system is a function of the number of signal positions chosen for examination within each interval. A secondary signal is produced for each signal position and these secondary signals are summed over preselected resolution intervals. A weighting arrangement is provided which weights the individual secondary signals inversely with their distance from the central resolution interval of the set.

Abstract: A DC voltage convertor utilizes a switching transistor for switching the primary of a power transformer inserted in the emitter-collector circuit of the transistor, the base of the transistor is connected to the secondary of a control transformer which has its primary connected in series with the primary of the power transformer. A further secondary winding on the control transformer is connected to a transistor control circuit, which is controlled by a voltage dependent on the output voltage of the converter, provides voltage stabilization without galvanic connection between the primary and secondary sides.