Abstract: The present invention provides a simple and efficient cipher and key generation and selection capability from a predetermined, randomly changing, fixed size matrix (N) of ciphers and keys resulting in a very high-order approximation (Nr,c??) of a true One Time Pad for encryption solutions such as the CipherLoc Polymorphic Key Progression Algorithmic Cipher Engine. The ciphers are randomly selected from a pool of user supplied ciphers, FIPS 140-2 or other certified ciphers and the keys are produced from various methods for generating a key that includes reading a data stream from a network or a Cryptographic Pseudo Random Number Generator (CPRNG)/Pseudo Random Number Generator (PRNG) or a Predetermined Cryptographic Key Generator (PCKG) or any combination of all. Ciphers and generated keys are randomly paired and stored in a volatile matrix for use by an encryption solution.

Abstract: Virtual field programmable gate array (VFPGA) duplicates and/or emulates a field programmable gate array through the use of base hardware and firmware that uses RAM as ROM or EPROM and provides control and monitoring and manipulation through the use of elementary and basic device functionality commands (machine code primitives) to accommodate the needs of polymorphic cipher engine software so that the software achieves the same results as thou it had access to programmable logic arrays, gate and logic blocks found in field programmable gate array chips.

Abstract: Virtual field programmable gate array (VFPGA) duplicates and/or emulates a field programmable gate array through the use of base hardware and firmware that uses RAM as ROM or EPROM and provides control and monitoring and manipulation through the use of elementary and basic device functionality commands (machine code primitives) to accommodate the needs of polymorphic cipher engine software so that the software achieves the same results as thou it had access to programmable logic arrays, gate and logic blocks found in field programmable gate array chips.

Abstract: An apparatus and method for monitoring the physical wiring plant of a computer local area network (LAN) in order to detect the presence of extraneous electronic circuitry placed onto that physical wiring which were not originally designed as part of the electronic circuitry of that LAN and reporting the presence of that additional electronic circuitry and taking action against that additional electronic circuitry based on user directive. The LAN asset being monitored could consist of a single device such as a computer, cell phone, credit card machine, network interface card, printer/scanner, server, router, modem, etc. or an entire network of many such devices.

Abstract: The present invention provides a simple and efficient cipher and key generation and selection capability from a predetermined, randomly changing, fixed size matrix (N) of ciphers and keys resulting in a very high-order approximation (Nr,c??) of a true One Time Pad for encryption solutions such as the CipherLoc Polymorphic Key Progression Algorithmic Cipher Engine. The ciphers are randomly selected from a pool of user supplied ciphers, FIPS 140-2 or other certified ciphers and the keys are produced from various methods for generating a key that includes reading a data stream from a network or a Cryptographic Pseudo Random Number Generator (CPRNG)/Pseudo Random Number Generator (PRNG) or a Predetermined Cryptographic Key Generator (PCKG) or any combination of all. Ciphers and generated keys are randomly paired and stored in a volatile matrix for use by an encryption solution.