Patents Assigned to CIRASYS, INC.
  • Patent number: 9690308
    Abstract: In a preferred embodiment, a voltage converter comprises a voltage converter circuit, an output adjuster and a controller. The controller provides a control signal at a duty ratio determined dynamically by a set of input signals. The dynamic output adjuster determines the set of input signals by adjusting the ac component of an output voltage based on a gain Q. The dynamic output adjuster alleviates dependence on the value of Rc under leading edge modulation in either analog or digital converter systems. In addition to delivering the desired left half plane zero effects, dynamic output adjustment reduces the value of the output ripple. As a result, modern control methods such as input-output linearization can be used to design both boost and buck-boost PWM converters if only left half plane zero effects are present.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: June 27, 2017
    Assignees: BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, CIRASYS, INC.
    Inventors: Robert Jewell Taylor, Louis R. Hunt, Vikas V. Paduvalli
  • Patent number: 9413235
    Abstract: A system, method and apparatus for controlling boost and buck-boost converters using input-output linearization and leading-edge modulation is provided. The controller includes a summing circuit connected to the converter to create a third voltage representing a difference between the first voltage and the second voltage. A gain circuit is connected to the summing circuit to adjust the third voltage by an appropriate gain. A modulating circuit is connected to the gain circuit, the converter, the first voltage, the second voltage and the second current to create a control signal based on the first voltage, the second voltage, the adjusted third voltage, the fourth voltage and the first current. The control signal is used to control the converter. Typically, the first voltage is a converter output voltage, the second voltage is a reference voltage, the fourth voltage is a converter input voltage, and first current is a converter inductor current.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: August 9, 2016
    Assignees: CIRASYS, INC., THE BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM
    Inventors: Louis R. Hunt, Robert J. Taylor
  • Publication number: 20130154586
    Abstract: In a preferred embodiment, a voltage converter comprises a voltage converter circuit, an output adjuster and a controller. The controller provides a control signal at a duty ratio determined dynamically by a set of input signals. The dynamic output adjuster determines the set of input signals by adjusting the ac component of an output voltage based on a gain Q. The dynamic output adjuster alleviates dependence on the value of Rc under leading edge modulation in either analog or digital converter systems. In addition to delivering the desired left half plane zero effects, dynamic output adjustment reduces the value of the output ripple. As a result, modern control methods such as input-output linearization can be used to design both boost and buck-boost PWM converters if only left half plane zero effects are present.
    Type: Application
    Filed: December 19, 2012
    Publication date: June 20, 2013
    Applicants: BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, CIRASYS, INC.
    Inventors: Cirasys, Inc., Board of Regents, The University of Texas System