Patents Assigned to CIRASYS, INC.
  • Patent number: 9690308
    Abstract: In a preferred embodiment, a voltage converter comprises a voltage converter circuit, an output adjuster and a controller. The controller provides a control signal at a duty ratio determined dynamically by a set of input signals. The dynamic output adjuster determines the set of input signals by adjusting the ac component of an output voltage based on a gain Q. The dynamic output adjuster alleviates dependence on the value of Rc under leading edge modulation in either analog or digital converter systems. In addition to delivering the desired left half plane zero effects, dynamic output adjustment reduces the value of the output ripple. As a result, modern control methods such as input-output linearization can be used to design both boost and buck-boost PWM converters if only left half plane zero effects are present.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: June 27, 2017
    Assignees: BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, CIRASYS, INC.
    Inventors: Robert Jewell Taylor, Louis R. Hunt, Vikas V. Paduvalli
  • Patent number: 9413235
    Abstract: A system, method and apparatus for controlling boost and buck-boost converters using input-output linearization and leading-edge modulation is provided. The controller includes a summing circuit connected to the converter to create a third voltage representing a difference between the first voltage and the second voltage. A gain circuit is connected to the summing circuit to adjust the third voltage by an appropriate gain. A modulating circuit is connected to the gain circuit, the converter, the first voltage, the second voltage and the second current to create a control signal based on the first voltage, the second voltage, the adjusted third voltage, the fourth voltage and the first current. The control signal is used to control the converter. Typically, the first voltage is a converter output voltage, the second voltage is a reference voltage, the fourth voltage is a converter input voltage, and first current is a converter inductor current.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: August 9, 2016
    Assignees: CIRASYS, INC., THE BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM
    Inventors: Louis R. Hunt, Robert J. Taylor
  • Patent number: 9369041
    Abstract: A voltage converter for converting an input voltage to an output voltage is disclosed. The voltage converter includes a voltage converter circuit having a set of switches, a switch driver connected to the voltage converter circuit, a controller connected to the switch driver and the output voltage, a target output voltage connected to the controller, a control signal generated by the controller for the switch driver that includes a duty ratio based on the target output voltage and the output voltage. The switch driver is configured to apply the control signal to the set of switches and the voltage converter circuit generates the output voltage based on the duty ratio to match the target output voltage.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: June 14, 2016
    Assignees: Cirasys, Inc., The Board of Regents, The University of Texas System
    Inventors: Vikas V. Paduvalli, Louis R. Hunt, Poras T. Balsara, Robert J. Taylor
  • Patent number: 9252683
    Abstract: In a preferred embodiment, a voltage inverter comprises a voltage converter circuit and a controller. The voltage inverter produces a time-varying output voltage from an input voltage, which can be a DC input voltage or an AC input voltage. The controller provides a control signal at a duty ratio determined dynamically by a set of signals. The set of signals include the time-varying output voltage, a predetermined output voltage, a gain factor and an inductor current in the voltage converter circuit. The predetermined output voltage can have an AC waveform or an arbitrary time-varying waveform. The voltage inverter operates to match the time-varying output voltage to the predetermined output voltage. Input-output linearization is used to design a buck inverter, and input-output linearization with leading edge modulation is used to design boost and buck-boost inverters under conditions where left half plane zero effects are present.
    Type: Grant
    Filed: July 10, 2013
    Date of Patent: February 2, 2016
    Assignee: Cirasys, Inc.
    Inventor: Louis R. Hunt
  • Publication number: 20140361754
    Abstract: A voltage converter for converting an input voltage to an output voltage is disclosed. The voltage converter includes a voltage converter circuit having a set of switches, a switch driver connected to the voltage converter circuit, a controller connected to the switch driver and the output voltage, a target output voltage connected to the controller, a control signal generated by the controller for the switch driver that includes a duty ratio based on the target output voltage and the output voltage. The switch driver is configured to apply the control signal to the set of switches and the voltage converter circuit generates the output voltage based on the duty ratio to match the target output voltage.
    Type: Application
    Filed: August 21, 2014
    Publication date: December 11, 2014
    Applicants: Cirasys, Inc., The Board of Regents, The University of Texas System
    Inventors: Vikas V. Paduvalli, Louis R. Hunt, Poras T. Balsara, Robert J. Taylor
  • Publication number: 20140354255
    Abstract: A system, method and apparatus for controlling boost and buck-boost converters using input-output linearization and leading-edge modulation is provided. The controller includes a summing circuit connected to the converter to create a third voltage representing a difference between the first voltage and the second voltage. A gain circuit is connected to the summing circuit to adjust the third voltage by an appropriate gain. A modulating circuit is connected to the gain circuit, the converter, the first voltage, the second voltage and the second current to create a control signal based on the first voltage, the second voltage, the adjusted third voltage, the fourth voltage and the first current. The control signal is used to control the converter. Typically, the first voltage is a converter output voltage, the second voltage is a reference voltage, the fourth voltage is a converter input voltage, and first current is a converter inductor current.
    Type: Application
    Filed: August 18, 2014
    Publication date: December 4, 2014
    Applicants: Cirasys, Inc., The Board of Regents, The University of Texas System
    Inventors: Louis R. Hunt, Robert J. Taylor
  • Patent number: 8803498
    Abstract: An apparatus and method is presented for implementing and controlling a voltage converter with one input voltage and multiple output voltages. In the case of boost and buck-boost converters, a converter circuit with one inductor and a switched group of parallel connection capacitors is realized, one parallel connection for each output voltage. A duty ratio is monitored for the inductor and the switched group of capacitors to provide a set of duty ratios. The duty ratios form a control vector which describes the control inputs. The output voltages are the control outputs describing a MIMO system. A generalized Cuk-Middlebrook modeling approach is applied to the voltage converter, along with linearization and MIMO control methods to regulate all output voltages to desired levels.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: August 12, 2014
    Assignees: Cirasys, Inc., Board of Regents, The University of Texas System
    Inventors: Louis Roberts Hunt, Dinesh Kumar Bhatia, Poras T. Balsara
  • Publication number: 20130154586
    Abstract: In a preferred embodiment, a voltage converter comprises a voltage converter circuit, an output adjuster and a controller. The controller provides a control signal at a duty ratio determined dynamically by a set of input signals. The dynamic output adjuster determines the set of input signals by adjusting the ac component of an output voltage based on a gain Q. The dynamic output adjuster alleviates dependence on the value of Rc under leading edge modulation in either analog or digital converter systems. In addition to delivering the desired left half plane zero effects, dynamic output adjustment reduces the value of the output ripple. As a result, modern control methods such as input-output linearization can be used to design both boost and buck-boost PWM converters if only left half plane zero effects are present.
    Type: Application
    Filed: December 19, 2012
    Publication date: June 20, 2013
    Applicants: BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, CIRASYS, INC.
    Inventors: Cirasys, Inc., Board of Regents, The University of Texas System